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hal: renesas: Add device-specific helper macros
Add helper macros to check peripherals memory boundaries. Signed-off-by: Ioannis Karachalios <[email protected]>
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+99
-8
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3 files changed

+99
-8
lines changed

‎smartbond/da1469x_hal/da1469x_config.h‎

Lines changed: 68 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -26,11 +26,78 @@ extern "C" {
2626

2727
#include <zephyr/irq.h>
2828

29-
#define MCU_OTPM_BASE (0x30080000UL)
29+
#define MCU_REMAPPED_BASE (0x00000000UL)
30+
/* The max. remapped memory size supported. */
31+
#define MCU_REMAPPED_SIZE (0x02000000UL)
32+
33+
/*
34+
* OTP memory base address; should be used when accessed by
35+
* peripheral devices (DMA, CRYPTO etc.).
36+
*/
37+
#define MCU_OTP_M_P_BASE (0x30080000UL)
38+
/* The max. supported OTP region size */
39+
#define MCU_OTP_M_P_SIZE (0x00010000UL)
40+
41+
/* OTP memory base address (not remapped) */
42+
#define MCU_OTP_M_BASE (0x10080000UL)
43+
/* The max. supported OTP region size */
44+
#define MCU_OTP_M_SIZE (0x00010000UL)
45+
46+
#define MCU_ROM_BASE (0x900000UL)
47+
#define MCU_ROM_SIZE (0x20000UL)
48+
49+
/* Actual memory size integrated into SoC */
3050
#define MCU_OTPM_SIZE (4096)
3151
#define MCU_OTPM_CS_OFFSET (0x0c00)
3252
#define MCU_OTPM_CS_LENGTH (0x0400)
3353

54+
/*
55+
* QSPI Flash memory based address. Accesses are done through the AHB code bus (cached).
56+
* The region size available is restricted according to CACHE_FLASH_REG (up to 32MB).
57+
*/
58+
#define MCU_QSPIF_M_CACHED_BASE (0x16000000UL)
59+
#define MCU_QSPIF_M_CACHED_SIZE (0x2000000UL)
60+
61+
/*
62+
* QSPIC Flash memory base address. Accesses are done through the AHB system bus (not cached).
63+
* Using this address space the whole Flash memory can be accesed (up to 32MB).
64+
*/
65+
#define MCU_QSPIF_M_BASE (0x36000000UL)
66+
#define MCU_QSPIF_M_SIZE (0x2000000UL)
67+
68+
/* System RAM base address (not cached) */
69+
#define MCU_SYSRAM_M_BASE (0x20000000UL)
70+
#define MCU_SYSRAM_M_SIZE (0x80000UL)
71+
72+
/* QSPIC2 RAM memory base address */
73+
#define MCU_QSPIR_M_BASE (0x32000000UL)
74+
#define MCU_QSPIR_M_SIZE (0x2000000UL)
75+
76+
77+
#define WITHIN_RANGE(_a, _s, _e) (((uint32_t)(_a) >= (uint32_t)(_s)) && ((uint32_t)(_a) < (uint32_t)(_e)))
78+
79+
/* True if the address provided is within the remapped region. Otherwise, false. */
80+
#define IS_REMAPPED_ADDRESS(_a) WITHIN_RANGE(_a, MCU_REMAPPED_BASE, MCU_REMAPPED_BASE + MCU_REMAPPED_SIZE)
81+
82+
/* True if the address provided is within the OTP region. Otherwise, false. */
83+
#define IS_OTP_ADDRESS(_a) WITHIN_RANGE(_a, MCU_OTP_M_BASE, MCU_OTP_M_BASE + MCU_OTP_M_SIZE)
84+
85+
/* True if the address provided is within the remapped OTP region. Otherwise, false. */
86+
#define IS_OTP_P_ADDRESS(_a) WITHIN_RANGE(_a, MCU_OTP_M_P_BASE, MCU_OTP_M_P_BASE + MCU_OTP_M_P_SIZE)
87+
88+
/* True if the address provided is within the SYSRAM region (no cached). Otherwise, false. */
89+
#define IS_SYSRAM_ADDRESS(_a) WITHIN_RANGE(_a, MCU_SYSRAM_M_BASE, MCU_SYSRAM_M_BASE + MCU_SYSRAM_M_SIZE)
90+
91+
/* True if the address provided is within the Flash region (not cached). Otherwise, false. */
92+
#define IS_QSPIF_ADDRESS(_a) WITHIN_RANGE(_a, MCU_QSPIF_M_BASE, MCU_QSPIF_M_BASE + MCU_QSPIF_M_SIZE)
93+
94+
/* True if the address provided is within the Flash region (cached). Otherwise, false. */
95+
#define IS_QSPIF_CACHED_ADDRESS(_a) WITHIN_RANGE(_a, MCU_QSPIF_M_CACHED_BASE, MCU_QSPIF_M_CACHED_BASE + \
96+
MCU_QSPIF_M_CACHED_SIZE)
97+
98+
/* True if the address provided is within the PSRAM region size. Otherwise, false */
99+
#define IS_QSPIR_ADDRESS(_a) WITHIN_RANGE(_a, MCU_QSPIR_M_BASE, MCU_QSPIR_M_BASE + MCU_QSPIR_M_SIZE)
100+
34101
#define MCU_TRIMV_GROUP_ID_MAX (18)
35102

36103
#define MCU_RCX_CAL_REF_CNT (100)

‎smartbond/da1469x_hal/da1469x_otp.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -85,7 +85,7 @@ da1469x_otp_tim1_adjust(int clk_speed)
8585
int
8686
da1469x_otp_read(uint32_t offset, void *dst, uint32_t num_bytes)
8787
{
88-
uint32_t *src_addr = (uint32_t *)(MCU_OTPM_BASE + offset);
88+
uint32_t *src_addr = (uint32_t *)(MCU_OTP_M_BASE + offset);
8989
uint32_t *dst_addr = dst;
9090

9191
if (offset >= MCU_OTPM_SIZE || (offset + num_bytes) > MCU_OTPM_SIZE) {
@@ -115,7 +115,7 @@ da1469x_otp_read(uint32_t offset, void *dst, uint32_t num_bytes)
115115
int
116116
da1469x_otp_write(uint32_t offset, const void *src, uint32_t num_bytes)
117117
{
118-
uint32_t *dst_addr = (uint32_t *)(MCU_OTPM_BASE + offset);
118+
uint32_t *dst_addr = (uint32_t *)(MCU_OTP_M_BASE + offset);
119119
const uint32_t *src_addr = src;
120120
int ret = 0;
121121

‎smartbond/da1469x_hal/da1469x_otp.h‎

Lines changed: 29 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -22,6 +22,7 @@
2222

2323
#include <stdbool.h>
2424
#include <stdint.h>
25+
#include <assert.h>
2526

2627
#ifdef __cplusplus
2728
extern "C" {
@@ -36,10 +37,19 @@ extern "C" {
3637
#define OTP_SEGMENT_USER_DATA_KEYS 0xa00
3738
#define OTP_SEGMENT_SIGNATURE_KEYS 0x8c0
3839
#define OTP_SEGMENT_USER_DATA_LEN 0x100
40+
#define OTP_SEGMENT_QSPI_FW_LEN 0x100
3941

40-
#define OTP_ADDRESS_RANGE_USER_DATA_KEYS(x) \
41-
(((uint32_t)(x) >= (uint32_t)MCU_OTPM_BASE + OTP_SEGMENT_USER_DATA_KEYS) && \
42-
((uint32_t)(x) < (uint32_t)MCU_OTPM_BASE + OTP_SEGMENT_USER_DATA_KEYS + OTP_SEGMENT_USER_DATA_LEN))
42+
#define IS_ADDRESS_USER_DATA_KEYS_SEGMENT(_a) \
43+
((((uint32_t)(_a) >= (uint32_t)MCU_OTP_M_BASE + OTP_SEGMENT_USER_DATA_KEYS) && \
44+
((uint32_t)(_a) < (uint32_t)MCU_OTP_M_BASE + OTP_SEGMENT_USER_DATA_KEYS + OTP_SEGMENT_USER_DATA_LEN)) || \
45+
(((uint32_t)(_a) >= (uint32_t)MCU_OTP_M_P_BASE + OTP_SEGMENT_USER_DATA_KEYS) && \
46+
((uint32_t)(_a) < (uint32_t)MCU_OTP_M_P_BASE + OTP_SEGMENT_USER_DATA_KEYS + OTP_SEGMENT_USER_DATA_LEN)))
47+
48+
#define IS_ADDRESS_QSPI_FW_KEYS_SEGMENT(_a) \
49+
((((uint32_t)(_a) >= (uint32_t)MCU_OTP_M_BASE + OTP_SEGMENT_QSPI_FW_KEYS) && \
50+
((uint32_t)(_a) < (uint32_t)MCU_OTP_M_BASE + OTP_SEGMENT_QSPI_FW_KEYS + OTP_SEGMENT_QSPI_FW_LEN)) || \
51+
(((uint32_t)(_a) >= (uint32_t)MCU_OTP_M_P_BASE + OTP_SEGMENT_QSPI_FW_KEYS) && \
52+
((uint32_t)(_a) < (uint32_t)MCU_OTP_M_P_BASE + OTP_SEGMENT_QSPI_FW_KEYS + OTP_SEGMENT_QSPI_FW_LEN)))
4353

4454
enum otpc_mode_val {
4555
OTPC_MODE_PDOWN = 0,
@@ -60,10 +70,24 @@ da1469x_otp_set_mode(enum otpc_mode_val mode)
6070
while (!(OTPC->OTPC_STAT_REG & OTPC_OTPC_STAT_REG_OTPC_STAT_MRDY_Msk));
6171
}
6272

63-
int da1469x_otp_write(uint32_t address, const void *src,
73+
static inline uint32_t
74+
da1469x_otp_address_to_cell_offset(uint32_t addr)
75+
{
76+
assert(IS_OTP_ADDRESS(addr) || IS_OTP_P_ADDRESS(addr));
77+
/* Address should be cell size alinged */
78+
assert(!(addr % 4));
79+
80+
if (addr < MCU_OTP_M_P_BASE) {
81+
return (addr - MCU_OTP_M_BASE) / 4;
82+
} else {
83+
return (addr - MCU_OTP_M_P_BASE) / 4;
84+
}
85+
}
86+
87+
int da1469x_otp_write(uint32_t offset, const void *src,
6488
uint32_t num_bytes);
6589

66-
int da1469x_otp_read(uint32_t address, void *dst, uint32_t num_bytes);
90+
int da1469x_otp_read(uint32_t offset, void *dst, uint32_t num_bytes);
6791

6892
void da1469x_otp_init(void);
6993

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