diff --git a/Makefile.in b/Makefile.in index 0db1056..46266f6 100644 --- a/Makefile.in +++ b/Makefile.in @@ -118,17 +118,6 @@ NEWLIB_CC_FOR_TARGET ?= $(NEWLIB_TUPLE)-gcc NEWLIB_CXX_FOR_TARGET ?= $(NEWLIB_TUPLE)-g++ NEWLIB_TARGET_BOARDS ?= arc-sim -# QEMU sim setup for running the tests -ifeq (@target_alias@,arc) - QEMU_CPU = archs -else -ifeq (@target_alias@,arc32) - QEMU_CPU = hs5x -else - QEMU_CPU = hs6x -endif -endif - ifeq (@default_target@,linux) TARGET_ALIAS = $(call make_tuple,linux-gnu) TARGET_TRIPLET = $(call make_tupple,unknown-linux-gnu) @@ -145,8 +134,8 @@ endif ifeq ($(SIM),qemu) # Using qemu simulator. SIM_STAMP:= stamps/build-qemu - SIM_PATH:=$(srcdir)/scripts/wrapper/$(SIM) - SIM_PREPARE:=PATH="$(SIM_PATH):$(INSTALL_DIR)/bin:$(PATH)" ARC_SYSROOT="$(SYSROOT)" DEJAGNU="$(srcdir)/dejagnu/site.exp" QEMU_CPU="$(QEMU_CPU)" + SIM_PATH:=$(srcdir)/scripts/wrapper/$(SIM):$(srcdir)/scripts + SIM_PREPARE:=PATH="$(SIM_PATH):$(INSTALL_DIR)/bin:$(PATH)" ARC_SYSROOT="$(SYSROOT)" DEJAGNU="$(srcdir)/dejagnu/site.exp" ifeq (@default_target@,baremetal) SIM_PREPARE:=$(SIM_PREPARE) DEJAGNU_SIM_OPTIONS="-Wq,-semihosting" endif @@ -157,8 +146,8 @@ ifeq ($(SIM),nsim) $(error nSIM not supported) endif SIM_STAMP:= nsim-validation - SIM_PATH:=$(srcdir)/scripts/wrapper/$(SIM) - SIM_PREPARE:=PATH="$(SIM_PATH):$(INSTALL_DIR)/bin:$(PATH)" ARC_SYSROOT="$(SYSROOT)" DEJAGNU="$(srcdir)/dejagnu/site.exp" QEMU_CPU="$(QEMU_CPU)" + SIM_PATH:=$(srcdir)/scripts/wrapper/$(SIM):$(srcdir)/scripts + SIM_PREPARE:=PATH="$(SIM_PATH):$(INSTALL_DIR)/bin:$(PATH)" ARC_SYSROOT="$(SYSROOT)" DEJAGNU="$(srcdir)/dejagnu/site.exp" else $(error Only support SIM=nsim, or SIM=qemu (default)) endif diff --git a/scripts/mcpu-to-cpu-opts b/scripts/mcpu-to-cpu-opts new file mode 100755 index 0000000..c77b9c1 --- /dev/null +++ b/scripts/mcpu-to-cpu-opts @@ -0,0 +1,236 @@ +#!/usr/bin/env python3 + +import argparse +import sys +import elftools.elf.elffile +import elftools.elf.sections + +CPU_OPTIONS = { + "name": "", + "xlen": "", +} + +nsim_opts = { + "arc600": [ + "-p nsim_isa_family=a600", + "-p nsim_isa_core=6", + "-on nsim_isa_sat", + "-p nsim_isa_bitscan_option=0" + ], + "arc700": [ + "-p nsim_isa_family=a700", + "-on nsim_isa_sat", + "-on nsim_isa_mpy32" + ], + "arcem": [ + "-p nsim_isa_family=av2em", + "-p nsim_isa_core=3", + "-on nsim_isa_sat", + "-p nsim_isa_code_density_option=2", + "-p nsim_isa_mpy_option=2", + "-p nsim_isa_bitscan_option=0" + ], + "archs": [ + "-p nsim_isa_family=av2hs", + "-p nsim_isa_core=3", + "-on nsim_isa_sat", + "-p nsim_isa_atomic_option=1", + "-p nsim_isa_code_density_option=2", + "-p nsim_isa_div_rem_option=2", + "-p nsim_isa_ll64_option=1", + "-p nsim_isa_mpy_option=2" + ], + "em": [ + "-p nsim_isa_family=av2em", + "-p nsim_isa_core=3", + "-on nsim_isa_sat", + "-p nsim_isa_shift_option=0", + "-p nsim_isa_bitscan_option=0" + ], + "em4_fpuda": [ + "-p nsim_isa_family=av2em", + "-p nsim_isa_core=3", + "-on nsim_isa_sat", + "-p nsim_isa_code_density_option=2", + "-p nsim_isa_div_rem_option=2", + "-p nsim_isa_fpuda_option=1", + "-p nsim_isa_fpus_option=1", + "-p nsim_isa_mpy_option=2" + ], + "hs": [ + "-p nsim_isa_family=av2hs", + "-p nsim_isa_core=3", + "-on nsim_isa_sat", + "-p nsim_isa_atomic_option=1", + "-p nsim_isa_code_density_option=2" + ], + "hs34": [ + "-p nsim_isa_family=av2hs", + "-p nsim_isa_core=3", + "-on nsim_isa_sat", + "-p nsim_isa_atomic_option=1", + "-p nsim_isa_code_density_option=2", + "-p nsim_isa_mpy_option=2" + ], + "hs38_linux": [ + "-p nsim_isa_family=av2hs", + "-p nsim_isa_core=3", + "-on nsim_isa_sat", + "-p nsim_isa_atomic_option=1", + "-p nsim_isa_code_density_option=2", + "-p nsim_isa_div_rem_option=2", + "-p nsim_isa_fpud_option=1", + "-p nsim_isa_fpud_div_option=1", + "-p nsim_isa_fpus_option=1", + "-p nsim_isa_fpus_div_option=1", + "-p nsim_isa_fpu_mac_option=1", + "-p nsim_isa_ll64_option=1", + "-p nsim_isa_mpy_option=9" + ], + "hs4xd": [ + "-p nsim_isa_family=av2hs", + "-p nsim_isa_core=3", + "-on nsim_isa_sat", + "-p nsim_isa_atomic_option=1", + "-p nsim_isa_code_density_option=2", + "-p nsim_isa_div_rem_option=2", + "-p nsim_isa_ll64_option=1", + "-p nsim_isa_mpy_option=9" + ], + "hs58": [ + "-prop=nsim_hlink_gnu_io_ext=1", + "-p nsim_isa_family=av3hs", + "-p nsim_isa_pc_size=32", + "-p nsim_isa_addr_size=32", + "-p nsim_isa_swap_option=1", + "-p nsim_isa_div_rem_option=2", + "-p nsim_isa_mpy_option=9", + "-p nsim_isa_unaligned_option=1", + "-p nsim_isa_atomic_option=1", + "-p nsim_isa_ll64_option=1", + "-p nsim_isa_fp_wide_option=1", + "-p nsim_isa_shift_option=0", + "-p nsim_isa_bitscan_option=0" + ], + "hs5x": [ + "-prop=nsim_hlink_gnu_io_ext=1", + "-p nsim_isa_family=av3hs", + "-p nsim_isa_pc_size=32", + "-p nsim_isa_addr_size=32", + "-p nsim_isa_swap_option=1", + "-p nsim_isa_div_rem_option=2", + "-p nsim_isa_mpy_option=9", + "-p nsim_isa_unaligned_option=1", + "-p nsim_isa_atomic_option=1", + "-p nsim_isa_fp_wide_option=1", + "-p nsim_isa_shift_option=0", + "-p nsim_isa_bitscan_option=0" + ], + "hs68": [ + "-prop=nsim_hlink_gnu_io_ext=1", + "-p nsim_isa_family=arc64", + "-p nsim_isa_div_rem_option=2", + "-p nsim_isa_mpy_option=9", + "-p nsim_isa_mpy64=1", + "-p nsim_isa_div64_option=1", + "-p nsim_isa_has_fp=1", + "-p nsim_isa_fp_vec_option=1", + "-p nsim_isa_fp_hp_option=1", + "-p nsim_isa_fp_dp_option=1", + "-p nsim_isa_fp_div_option=1", + "-p nsim_isa_fp_num_regs=32", + "-p nsim_isa_unaligned_option=1", + "-p nsim_isa_atomic_option=1", + "-p nsim_isa_m128_option=1", + "-p nsim_isa_fp_wide_option=1", + "-p nsim_isa_shift_option=0", + "-p nsim_isa_bitscan_option=0" + ], + "hs6x": [ + "-prop=nsim_hlink_gnu_io_ext=1", + "-p nsim_isa_family=arc64", + "-p nsim_isa_div_rem_option=2", + "-p nsim_isa_mpy_option=9", + "-p nsim_isa_mpy64=1", + "-p nsim_isa_div64_option=1", + "-p nsim_isa_has_fp=1", + "-p nsim_isa_fp_vec_option=1", + "-p nsim_isa_fp_hp_option=1", + "-p nsim_isa_fp_dp_option=1", + "-p nsim_isa_fp_div_option=1", + "-p nsim_isa_fp_num_regs=32", + "-p nsim_isa_unaligned_option=1", + "-p nsim_isa_atomic_option=1", + "-p nsim_isa_fp_wide_option=1", + "-p nsim_isa_shift_option=0", + "-p nsim_isa_bitscan_option=0" + ] +} + +def print_nsim_opts(): + cpu_name = CPU_OPTIONS["name"] + opts = " ".join(nsim_opts[cpu_name]) + return opts + +def open_elf(path): + try: + elffile = elftools.elf.elffile.ELFFile(open(path, 'rb')) + except elftools.common.exceptions.ELFError: + raise Exception("%s is not ELF file!" % path) + return elffile + +def get_xlen(path): + elffile = open_elf(path) + return elffile.elfclass + +def get_arc_cpu_name_bits(path): + elffile = open_elf(path) + + sec = elffile.get_section_by_name(".ARC.attributes") + if not sec: + raise RuntimeError(".ARC.attributes section not found") + + data = sec.data() + for i, b in enumerate(data): + if b == 0x07: # Tag_ARC_CPU_name + # Extract following null-terminated string + j = i + 1 + while j < len(data) and data[j] != 0: + j += 1 + return data[i+1:j].decode() + + raise RuntimeError("CPU name not found") + +def parse_elf_file(elf_file_path): + xlen = get_xlen(elf_file_path) + cpu_name = get_arc_cpu_name_bits(elf_file_path) + CPU_OPTIONS["name"] = cpu_name + CPU_OPTIONS["xlen"] = xlen + +def parse_opt(argv): + parser = argparse.ArgumentParser() + parser.add_argument('--elf-file-path', type=str) + parser.add_argument('--print-xlen', action='store_true', default=False) + parser.add_argument('--print-cpu', action='store_true', default=False) + parser.add_argument('--print-nsim-opts', action='store_true', default=False) + opt = parser.parse_args() + return opt + +def main(argv): + opt = parse_opt(argv) + + parse_elf_file(opt.elf_file_path) + + if opt.print_xlen: + print(CPU_OPTIONS['xlen']) + return + + if opt.print_cpu: + print(CPU_OPTIONS['name']) + return + + if opt.print_nsim_opts: + print(print_nsim_opts()) + +if __name__ == '__main__': + sys.exit(main(sys.argv)) diff --git a/scripts/wrapper/nsim/arc-elf32-run b/scripts/wrapper/nsim/arc-elf32-run deleted file mode 100755 index 1fb55e9..0000000 --- a/scripts/wrapper/nsim/arc-elf32-run +++ /dev/null @@ -1,29 +0,0 @@ -#!/bin/bash - -nsimdrv \ - -on nsim_isa_enable_timer_0 \ - -on nsim_isa_enable_timer_1 \ - -off invalid_instruction_interrupt \ - -off memory_exception_interrupt \ - -on nsim_download_elf_sections \ - -prop=nsim_emt=1 \ - -p nsim_isa_family=av2hs \ - -p nsim_isa_core=4 \ - -p nsim_isa_div_rem_option=2 \ - -p nsim_isa_mpy64=1 \ - -p nsim_isa_div64_option=1 \ - -p nsim_isa_unaligned_option=1 \ - -p nsim_isa_atomic_option=1 \ - -p nsim_isa_shift_option=0 \ - -p nsim_isa_bitscan_option=0 \ - -p nsim_isa_ll64_option=1 \ - -p nsim_isa_fmp_sat_option=1 \ - -p nsim_isa_mpy_option=9 \ - -p nsim_isa_fpus_option=1 \ - -p nsim_isa_fpud_option=1 \ - -p nsim_isa_m128_option=1 \ - -p nsim_isa_fpud_div_option=1 \ - -p nsim_isa_fpu_mac_option=1 \ - "$@" - - diff --git a/scripts/wrapper/nsim/arc-elf32-run b/scripts/wrapper/nsim/arc-elf32-run new file mode 120000 index 0000000..1ce3f3c --- /dev/null +++ b/scripts/wrapper/nsim/arc-elf32-run @@ -0,0 +1 @@ +arc64-elf-run \ No newline at end of file diff --git a/scripts/wrapper/nsim/arc32-elf-run b/scripts/wrapper/nsim/arc32-elf-run deleted file mode 100755 index 2d1d2e1..0000000 --- a/scripts/wrapper/nsim/arc32-elf-run +++ /dev/null @@ -1,68 +0,0 @@ -#!/bin/bash - -# nsimdrv \ -# -on nsim_isa_enable_timer_0 \ -# -on nsim_isa_enable_timer_1 \ -# -off invalid_instruction_interrupt \ -# -off memory_exception_interrupt \ -# -on nsim_download_elf_sections \ -# -prop=nsim_emt=1 \ -# -p nsim_isa_family=av2hs \ -# -p nsim_isa_core=4 \ -# -p nsim_isa_div_rem_option=2 \ -# -p nsim_isa_mpy64=1 \ -# -p nsim_isa_div64_option=1 \ -# -p nsim_isa_unaligned_option=1 \ -# -p nsim_isa_atomic_option=1 \ -# -p nsim_isa_shift_option=0 \ -# -p nsim_isa_bitscan_option=0 \ -# -p nsim_isa_ll64_option=1 \ -# -p nsim_isa_fmp_sat_option=1 \ -# -p nsim_isa_mpy_option=9 \ -# -p nsim_isa_fpus_option=1 \ -# -p nsim_isa_fpud_option=1 \ -# -p nsim_isa_m128_option=1 \ -# -p nsim_isa_fpud_div_option=1 \ -# -p nsim_isa_fpu_mac_option=1 \ -# "$@" - -# nsimdrv \ -# -prop=nsim_emt=1 \ -# -p nsim_isa_family=av3hs \ -# -p nsim_isa_has_hw_pf=1 \ -# -p nsim_isa_dual_issue_option=1 \ -# -p nsim_isa_atomic_option=2 \ -# -p nsim_isa_m128_option=0 \ -# -p nsim_isa_ll64_option=1 \ -# -p nsim_isa_mpy_option=9 \ -# -p nsim_isa_div_rem_option=2 \ -# -p nsim_isa_enable_timer_0=1 \ -# -p nsim_isa_enable_timer_1=1 \ -# -p nsim_isa_eco=6 \ -# -p icache=16384,64,4 \ -# -p dcache=16384,64,2 \ -# -p mmu_version=16 \ -# -p mmu_pagesize=4096 \ -# -p mmu_address_space=32 \ -# -p nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=24 \ -# -p nsim_isa_number_of_interrupts=32 \ -# -p nsim_isa_number_of_external_interrupts=32 \ -# "$@" - -nsimdrv \ - -on nsim_isa_enable_timer_0 \ - -on nsim_isa_enable_timer_1 \ - -off invalid_instruction_interrupt \ - -off memory_exception_interrupt \ - -on nsim_download_elf_sections \ - -prop=nsim_emt=1 \ - -p nsim_isa_family=av3hs \ - -p nsim_isa_div_rem_option=2 \ - -p nsim_isa_mpy_option=9 \ - -p nsim_isa_mpy64=1 \ - -p nsim_isa_div64_option=1 \ - -p nsim_isa_unaligned_option=1 \ - -p nsim_isa_atomic_option=1 \ - -p nsim_isa_shift_option=0 \ - -p nsim_isa_bitscan_option=0 \ - "$@" \ No newline at end of file diff --git a/scripts/wrapper/nsim/arc32-elf-run b/scripts/wrapper/nsim/arc32-elf-run new file mode 120000 index 0000000..1ce3f3c --- /dev/null +++ b/scripts/wrapper/nsim/arc32-elf-run @@ -0,0 +1 @@ +arc64-elf-run \ No newline at end of file diff --git a/scripts/wrapper/nsim/arc64-elf-run b/scripts/wrapper/nsim/arc64-elf-run index 8c113a6..5b49b0b 100755 --- a/scripts/wrapper/nsim/arc64-elf-run +++ b/scripts/wrapper/nsim/arc64-elf-run @@ -1,26 +1,13 @@ #!/bin/bash +opts=$(mcpu-to-cpu-opts --elf-file-path $1 --print-nsim-opts) + nsimdrv \ - -on nsim_isa_enable_timer_0 \ - -on nsim_isa_enable_timer_1 \ - -off invalid_instruction_interrupt \ - -off memory_exception_interrupt \ - -on nsim_download_elf_sections \ - -prop=nsim_emt=1 \ - -p nsim_isa_family=arc64 \ - -p nsim_isa_div_rem_option=2 \ - -p nsim_isa_mpy_option=9 \ - -p nsim_isa_mpy64=1 \ - -p nsim_isa_div64_option=1 \ - -p nsim_isa_has_fp=1 \ - -p nsim_isa_fp_vec_option=1 \ - -p nsim_isa_fp_hp_option=1 \ - -p nsim_isa_fp_dp_option=1 \ - -p nsim_isa_fp_div_option=1 \ - -p nsim_isa_fp_num_regs=32 \ - -p nsim_isa_unaligned_option=1 \ - -p nsim_isa_atomic_option=1 \ - -p nsim_isa_fp_wide_option=1 \ - -p nsim_isa_shift_option=0 \ - -p nsim_isa_bitscan_option=0 \ - "$@" \ No newline at end of file + -on nsim_isa_enable_timer_0 \ + -on nsim_isa_enable_timer_1 \ + -off invalid_instruction_interrupt \ + -off memory_exception_interrupt \ + -on nsim_download_elf_sections \ + -prop=nsim_emt=1 \ + ${opts} \ + "$@" diff --git a/scripts/wrapper/qemu/arc64-elf-run b/scripts/wrapper/qemu/arc64-elf-run index 041e6c6..058f3db 100755 --- a/scripts/wrapper/qemu/arc64-elf-run +++ b/scripts/wrapper/qemu/arc64-elf-run @@ -10,7 +10,8 @@ do shift done -xlen="$(readelf -h $1 | grep 'Class' | cut -d: -f 2 | xargs echo | sed 's/^ELF//')" +cpu=$(mcpu-to-cpu-opts --elf-file-path $1 --print-cpu) +xlen=$(mcpu-to-cpu-opts --elf-file-path $1 --print-xlen) case "$xlen" in 64) qemu="64" @@ -19,5 +20,5 @@ case "$xlen" in mem="2G";; esac -qemu-system-arc$qemu -cpu ${QEMU_CPU} -M arc-sim -m $mem "${qemu_args[@]}" -nographic \ +qemu-system-arc$qemu -cpu $cpu -M arc-sim -m $mem "${qemu_args[@]}" -nographic \ -no-reboot -monitor none -kernel "$@" diff --git a/scripts/wrapper/qemu/arc64-linux-gnu-run b/scripts/wrapper/qemu/arc64-linux-gnu-run index cda0646..4dbb3fe 100755 --- a/scripts/wrapper/qemu/arc64-linux-gnu-run +++ b/scripts/wrapper/qemu/arc64-linux-gnu-run @@ -10,11 +10,12 @@ do shift done -xlen="$(readelf -h $1 | grep 'Class' | cut -d: -f 2 | xargs echo | sed 's/^ELF//')" +cpu=$(mcpu-to-cpu-opts --elf-file-path $1 --print-cpu) +xlen=$(mcpu-to-cpu-opts --elf-file-path $1 --print-xlen) case "$xlen" in 64) qemu="64";; *) qemu="";; esac -qemu-arc$qemu -cpu ${QEMU_CPU} -R 3G "${qemu_args[@]}" -L ${ARC_SYSROOT} "$@" +qemu-arc$qemu -cpu $cpu -R 3G "${qemu_args[@]}" -L ${ARC_SYSROOT} "$@"