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Extend UART disconnect time for team race #238

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Merged
ligenxxxx merged 1 commit into from
Mar 21, 2025
Merged

Extend UART disconnect time for team race #238

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46 changes: 22 additions & 24 deletions src/msp_displayport.c
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Original file line number Diff line number Diff line change
Expand Up @@ -198,7 +198,7 @@ void msp_task() {
else
msp_cmd_tx();

if (seconds - fc_lst_rcv_sec > 2) {
if (seconds - fc_lst_rcv_sec > 5) {
if (TEAM_RACE == 0x01)
vtx_paralized();
}
Expand Down Expand Up @@ -769,23 +769,22 @@ uint8_t msp_send_header_v2(uint16_t len, uint16_t msg) {
return crc;
}

// Send commands to the FC.
// Ensure VARIANT is processed first, followed by CONFIG, then the others.
void msp_cmd_tx()
{
// Send commands to the FC.
// Ensure VARIANT is processed first, followed by CONFIG, then the others.
void msp_cmd_tx() {
uint8_t const msp_cmd[5] = {
MSP_FC_VARIANT,
MSP_GET_VTX_CONFIG,
MSP_GET_OSD_CANVAS,
MSP_STATUS,
MSP_RC
};
MSP_RC};

uint8_t idx, start = 0, end = 0;

// Process in strict order: VARIANT; VTX_CONFIG; then STATUS/RC/OSD_CANVAS
if (fc_lock & FC_VARIANT_LOCK) {
start = 1; end = 1; // Config only
start = 1;
end = 1; // Config only
if (fc_lock & FC_VTX_CONFIG_LOCK) {
end = 4; // the rest...
if (msp_cmp_fc_variant("INAV")) {
Expand All @@ -796,7 +795,7 @@ void msp_cmd_tx()

for (idx = start; idx <= end; idx++) {
msp_send_command(0, MSP_HEADER_V1);
msp_tx(0x00); // len
msp_tx(0x00); // len
msp_tx(msp_cmd[idx]); // function
msp_tx(msp_cmd[idx]); // crc
}
Expand Down Expand Up @@ -948,10 +947,9 @@ void msp_set_vtx_config(uint8_t power, uint8_t save) {
crc ^= 0x08; // channel count
#if defined HDZERO_FREESTYLE_V1 || HDZERO_FREESTYLE_V2
if (powerLock) {
msp_tx(3); // power locked to 25/200/0mW
msp_tx(3); // power locked to 25/200/0mW
crc ^= (3);
}
else
} else
#endif
{
msp_tx(POWER_MAX + 2); // power count (including 0mW)
Expand Down Expand Up @@ -1011,7 +1009,7 @@ uint8_t msp_vtx_set_channel(uint8_t const channel) {
DM6300_SetChannel(channel);
return 1;
}

void msp_set_osd_canvas(void) {
uint8_t crc = 0;
if (msp_cmp_fc_variant("BTFL")) {
Expand Down Expand Up @@ -1062,8 +1060,8 @@ void parse_vtx_params(uint8_t isMSP_V2) {

fc_pwr_rx = msp_rx_buf[3];
if (fc_pwr_rx == 0) {
fc_pwr_rx = POWER_MAX+2; // 0mW
} else if (fc_pwr_rx > (POWER_MAX+2)) {
fc_pwr_rx = POWER_MAX + 2; // 0mW
} else if (fc_pwr_rx > (POWER_MAX + 2)) {
fc_pwr_rx = 1; // min power if invalid
}

Expand Down Expand Up @@ -1165,7 +1163,7 @@ void parse_vtx_params(uint8_t isMSP_V2) {
temp_err = 1;
}
} else if (nxt_pwr <= POWER_MAX) {
RF_POWER = nxt_pwr;
RF_POWER = nxt_pwr;

if (PIT_MODE)
nxt_pwr = POWER_MAX + 1;
Expand Down Expand Up @@ -1195,9 +1193,9 @@ void parse_vtx_params(uint8_t isMSP_V2) {

if (needSaveEEP) {
Setting_Save();
}
}
}

void parse_vtx_config(void) {
fc_lock |= FC_VTX_CONFIG_LOCK;
parse_vtx_params(0);
Expand Down Expand Up @@ -1999,12 +1997,12 @@ void set_vtx_param() {
}
} else if (heat_protect) {
#if defined HDZERO_FREESTYLE_V1 || HDZERO_FREESTYLE_V2
WriteReg(0, 0x8F, 0x00); // dm6300 reset low
WriteReg(0, 0x8F, 0x01); // dm6300 reset high
DM6300_Init(RF_FREQ, RF_BW); // Set bandwidth
DM6300_SetChannel(RF_FREQ); // Set band/channel
WriteReg(0, 0x8F, 0x00); // dm6300 reset low
WriteReg(0, 0x8F, 0x01); // dm6300 reset high
DM6300_Init(RF_FREQ, RF_BW); // Set bandwidth
DM6300_SetChannel(RF_FREQ); // Set band/channel
DM6300_SetPower(0, RF_FREQ, 0); // Set low power (25mW)
WriteReg(0, 0x8F, 0x11); // enable 5680 video engine
WriteReg(0, 0x8F, 0x11); // enable 5680 video engine
#else
DM6300_SetPower(RF_POWER, RF_FREQ, pwr_offset);
cur_pwr = RF_POWER;
Expand Down