pm: allow reset when reset type is set

If ISH is busy and not read reset_prep_avail in time, ap could starts
its boot flow and clear the bit. To make sure ISH won't miss reboot
request, check the reset type also.

Signed-off-by: Li Feng <li1.feng@intel.com>

Author: lifenggitacc

bsp_sedi/soc/intel_ish/pm/aon/aon_task.c

@@ -16,6 +16,7 @@
 #define AON_IDT_ENTRY_VEC_FIRST		SEDI_VEC_RESET_PREP
 #define AON_IDT_ENTRY_VEC_LAST		SEDI_VEC_PMU2IOAPIC
 
+#define PMU_RST_AP_REBOOT 0x40
 static void handle_reset(enum ish_pm_state pm_state);
 
 /* ISR for PMU wakeup interrupt */
@@ -654,6 +655,8 @@ static void sram_exit_sleep_mode(void)
 
 static void handle_d0i2(void)
 {
+	uint32_t reg_val;
+
 	pg_exit_save_ctx();
 	aon_share.pg_exit = 0;
 
@@ -700,8 +703,11 @@ static void handle_d0i2(void)
 		continue;
 #endif
 
-	if (read32(PMU_RST_PREP) & PMU_RST_PREP_AVAIL)
+	reg_val = read32(PMU_RST_PREP);
+	if ((reg_val & PMU_RST_PREP_AVAIL) ||
+		((reg_val & PMU_RST_PREP_RESET_TYPE) == PMU_RST_AP_REBOOT)) {
 		handle_reset(ISH_PM_STATE_RESET_PREP);
+	}
 
 	if (aon_share.pg_exit)
 		ish_dma_set_msb(PAGING_CHAN, aon_share.uma_msb,
@@ -711,6 +717,7 @@ static void handle_d0i2(void)
 static void handle_d0i3(void)
 {
 	int ret;
+	uint32_t reg_val;
 
 	pg_exit_save_ctx();
 	aon_share.pg_exit = 0;
@@ -744,8 +751,11 @@ static void handle_d0i3(void)
 
 	clear_vnnred_aoncg();
 
-	if (read32(PMU_RST_PREP) & PMU_RST_PREP_AVAIL)
+	reg_val = read32(PMU_RST_PREP);
+	if ((reg_val & PMU_RST_PREP_AVAIL) ||
+		((reg_val & PMU_RST_PREP_RESET_TYPE) == PMU_RST_AP_REBOOT)) {
 		handle_reset(ISH_PM_STATE_RESET_PREP);
+	}
 
 	/* power on main SRAM */
 	sram_power(1);

bsp_sedi/soc/intel_ish/pm/pm_regs.h

@@ -63,6 +63,7 @@
 #define PMU_RST_PREP			(SEDI_PMU_BASE + 0x5c)
 #define PMU_RST_PREP_GET		BIT(0)
 #define PMU_RST_PREP_AVAIL		BIT(1)
+#define PMU_RST_PREP_RESET_TYPE	0x3FC
 #define PMU_RST_PREP_INT_MASK		BIT(31)
 
 #define VNN_ID_DMA0			4