sync ipex 20240618

Author: DDEle

include/experimental/common/base_types.hpp

@@ -0,0 +1,49 @@
+/*******************************************************************************
+ * Copyright (c) 2022-2023 Intel Corporation
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *******************************************************************************/
+
+/// @file
+/// C++ API
+
+#pragma once
+
+namespace gpu::xetla {
+
+/// @brief xetla 4bits data packed as 8bits data type.
+/// 2 4bit data pack to one byte
+struct int4x2 {
+  uint8_t data;
+
+  operator uint8_t() const {
+    return data;
+  }
+  int4x2(uint8_t val) {
+    data = val;
+  }
+};
+
+/// @brief Used to check if the type is xetla internal data type
+template <>
+struct is_internal_type<int4x2> {
+  static constexpr bool value = true;
+};
+
+/// @brief Set uint8_t as the native data type of int4x2.
+template <>
+struct native_type<int4x2> {
+  using type = uint8_t;
+};
+
+} // namespace gpu::xetla

include/experimental/common/common.hpp

@@ -0,0 +1,23 @@
+/*******************************************************************************
+ * Copyright (c) 2022-2023 Intel Corporation
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *******************************************************************************/
+
+/// @file
+/// C++ API
+
+#pragma once
+
+#include <common/common.hpp>
+#include <experimental/common/base_types.hpp>

include/experimental/kernel/gemm/impl/int4_dequantize_kslicing_xe.hpp

@@ -558,7 +558,8 @@ class gemm_universal_t<
     //         args.matrix_m,
     //         args.matC_ld);
     //   } else {
-    //     implementable &= kernel::general_1d<arch_tag, dtype_c>::check_alignment(
+    //     implementable &= kernel::general_1d<arch_tag,
+    //     dtype_c>::check_alignment(
     //         args.matC_base.base, args.matC_ld);
     //   }
     // }

include/experimental/kernel/layer_norm/layer_norm_fwd_xe.hpp

@@ -326,7 +326,7 @@ struct layer_norm_fwd_t<
         itr_count += 1;
         nbarrier.wait();
 
-        xetla_vector<dtype_acc, wg_size_x * 2> mu_m2_vec =
+        xetla_vector<dtype_acc, wg_size_x* 2> mu_m2_vec =
             xetla_load_local<dtype_acc, wg_size_x * 2>(slm_load_base);
         xetla_vector<dtype_acc, wg_size_x> mu_vec =
             mu_m2_vec.xetla_select<wg_size_x, 2>(0);

include/kernel/gemm/impl/default_xe.hpp

@@ -283,7 +283,8 @@ class gemm_universal_t<
     //         args.matrix_m,
     //         args.matC_ld);
     //   } else {
-    //     implementable &= kernel::general_1d<arch_tag, dtype_c>::check_alignment(
+    //     implementable &= kernel::general_1d<arch_tag,
+    //     dtype_c>::check_alignment(
     //         args.matC_base.base, args.matC_ld);
     //   }
     // }

include/kernel/gemm/impl/stream_k_xe.hpp

@@ -337,7 +337,8 @@ class gemm_universal_t<
     //         args.matrix_m,
     //         args.matC_ld);
     //   } else {
-    //     implementable &= kernel::general_1d<arch_tag, dtype_c>::check_alignment(
+    //     implementable &= kernel::general_1d<arch_tag,
+    //     dtype_c>::check_alignment(
     //         args.matC_base.base, args.matC_ld);
     //   }
     // }

include/subgroup/tile/impl/payload_xe.hpp

@@ -86,7 +86,7 @@ struct mem_payload_t<
   xetla_vector<uint32_t, 16 * num_block> payloads;
 
   inline mem_payload_t(const this_payload_t& rhs) {
-    this->payload = rhs.payload;
+    this->payloads = rhs.payloads;
   }
 
   inline mem_payload_t(mem_desc_t& mem_desc) {
@@ -159,7 +159,7 @@ struct mem_payload_t<
   // ~mem_payload_t(){}
 
   inline this_payload_t& operator=(const this_payload_t& rhs) {
-    this->payload = rhs.payload;
+    this->payloads = rhs.payloads;
     return *this;
   }
 
@@ -1739,9 +1739,6 @@ struct prefetch_payload_t<
     this->width_in_elems = rhs.width_in_elems;
     this->height_in_elems = rhs.height_in_elems;
 
-    this->step_x = rhs.step_x;
-    this->step_y = rhs.step_y;
-
     this->channel_offset = rhs.channel_offset;
   }
 
@@ -1756,8 +1753,6 @@ struct prefetch_payload_t<
     this->width_in_elems = rhs.width_in_elems;
     this->height_in_elems = rhs.height_in_elems;
 
-    this->step_x = rhs.step_x;
-    this->step_y = rhs.step_y;
     this->channel_offset = rhs.channel_offset;
     return *this;
   }