@@ -69,10 +69,12 @@ float left_velocity;
6969float right_velocity;
7070
7171// PID
72+ int pid_min = 0 ;
73+ int pid_max = 0 ;
7274
73- Pid left_pid (180 , 200 , 0 );
74- Pid right_pid (185 , 195 , 0 );
75- Pid cross_pid (50 , 20 , 0 );
75+ Pid left_pid (180 , 200 , 0 , pid_min, pid_max );
76+ Pid right_pid (185 , 195 , 0 , pid_min, pid_max );
77+ Pid cross_pid (50 , 20 , 0 , pid_min, pid_max );
7678
7779int left_dutycycle;
7880int right_dutycycle;
@@ -82,14 +84,12 @@ MotorController right_motor(sleep1_GPIO_Port,
8284sleep1_Pin,
8385 dir1_GPIO_Port,
8486 dir1_Pin,
85- &htim4,
86- TIM_CHANNEL_4 );
87+ &htim4, TIM_CHANNEL_4 );
8788MotorController left_motor (sleep2_GPIO_Port,
8889sleep2_Pin,
8990 dir2_GPIO_Port,
9091 dir2_Pin,
91- &htim4,
92- TIM_CHANNEL_3 );
92+ &htim4, TIM_CHANNEL_3 );
9393
9494// Communication
9595uint8_t *tx_buffer;
@@ -157,6 +157,14 @@ int main(void) {
157157 left_motor.setup ();
158158 right_motor.setup ();
159159
160+ // right and left motors have the same parameters
161+ pid_min = -left_motor.max_dutycycle_ ;
162+ pid_max = left_motor.max_dutycycle_ ;
163+
164+ left_pid.config (180 , 200 , 0 , pid_min, pid_max);
165+ right_pid.config (185 , 195 , 0 , pid_min, pid_max);
166+ cross_pid.config (50 , 20 , 0 , pid_min, pid_max);
167+
160168 left_motor.coast ();
161169 right_motor.coast ();
162170
@@ -190,8 +198,7 @@ void SystemClock_Config(void) {
190198 /* * Configure the main internal regulator output voltage
191199 */
192200 __HAL_RCC_PWR_CLK_ENABLE ();
193- __HAL_PWR_VOLTAGESCALING_CONFIG (PWR_REGULATOR_VOLTAGE_SCALE3 );
194- /* * Initializes the CPU, AHB and APB busses clocks
201+ __HAL_PWR_VOLTAGESCALING_CONFIG (PWR_REGULATOR_VOLTAGE_SCALE3 );/* * Initializes the CPU, AHB and APB busses clocks
195202 */
196203 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI ;
197204 RCC_OscInitStruct.HSIState = RCC_HSI_ON ;
@@ -226,13 +233,13 @@ void SystemClock_Config(void) {
226233static void MX_NVIC_Init (void ) {
227234 /* TIM3_IRQn interrupt configuration */
228235 HAL_NVIC_SetPriority (TIM3_IRQn, 2 , 1 );
229- HAL_NVIC_EnableIRQ (TIM3_IRQn);
236+ HAL_NVIC_EnableIRQ (TIM3_IRQn);
230237 /* TIM6_DAC_IRQn interrupt configuration */
231238 HAL_NVIC_SetPriority (TIM6_DAC_IRQn, 2 , 2 );
232- HAL_NVIC_EnableIRQ (TIM6_DAC_IRQn);
239+ HAL_NVIC_EnableIRQ (TIM6_DAC_IRQn);
233240 /* USART6_IRQn interrupt configuration */
234241 HAL_NVIC_SetPriority (USART6_IRQn, 1 , 0 );
235- HAL_NVIC_EnableIRQ (USART6_IRQn);
242+ HAL_NVIC_EnableIRQ (USART6_IRQn);
236243}
237244
238245/* USER CODE BEGIN 4 */
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