3737#include "private/common.h"
3838#include "utils.h"
3939
40+ #if defined(__aarch64__ ) && defined(__ARM_FEATURE_SHA2 )
41+ # define HAVE_SHA256_ARMCRYPTO 1
42+ # include <arm_neon.h>
43+ #endif
44+
4045static void
4146be32enc_vect (unsigned char * dst , const uint32_t * src , size_t len )
4247{
@@ -47,6 +52,158 @@ be32enc_vect(unsigned char *dst, const uint32_t *src, size_t len)
4752 }
4853}
4954
55+ #ifdef HAVE_SHA256_ARMCRYPTO
56+
57+ static const uint32_t Krnd [64 ] = {
58+ 0x428a2f98 , 0x71374491 , 0xb5c0fbcf , 0xe9b5dba5 , 0x3956c25b , 0x59f111f1 ,
59+ 0x923f82a4 , 0xab1c5ed5 , 0xd807aa98 , 0x12835b01 , 0x243185be , 0x550c7dc3 ,
60+ 0x72be5d74 , 0x80deb1fe , 0x9bdc06a7 , 0xc19bf174 , 0xe49b69c1 , 0xefbe4786 ,
61+ 0x0fc19dc6 , 0x240ca1cc , 0x2de92c6f , 0x4a7484aa , 0x5cb0a9dc , 0x76f988da ,
62+ 0x983e5152 , 0xa831c66d , 0xb00327c8 , 0xbf597fc7 , 0xc6e00bf3 , 0xd5a79147 ,
63+ 0x06ca6351 , 0x14292967 , 0x27b70a85 , 0x2e1b2138 , 0x4d2c6dfc , 0x53380d13 ,
64+ 0x650a7354 , 0x766a0abb , 0x81c2c92e , 0x92722c85 , 0xa2bfe8a1 , 0xa81a664b ,
65+ 0xc24b8b70 , 0xc76c51a3 , 0xd192e819 , 0xd6990624 , 0xf40e3585 , 0x106aa070 ,
66+ 0x19a4c116 , 0x1e376c08 , 0x2748774c , 0x34b0bcb5 , 0x391c0cb3 , 0x4ed8aa4a ,
67+ 0x5b9cca4f , 0x682e6ff3 , 0x748f82ee , 0x78a5636f , 0x84c87814 , 0x8cc70208 ,
68+ 0x90befffa , 0xa4506ceb , 0xbef9a3f7 , 0xc67178f2
69+ };
70+
71+ static void
72+ SHA256_Transform (uint32_t state [8 ], const uint8_t block [64 ], uint32_t W [64 ],
73+ uint32_t S [8 ])
74+ {
75+ uint32x4_t STATE0 , STATE1 ;
76+ uint32x4_t ABCD_SAVE , EFGH_SAVE ;
77+ uint32x4_t MSG0 , MSG1 , MSG2 , MSG3 ;
78+ uint32x4_t TMP0 , TMP1 , TMP2 ;
79+
80+ (void ) W ;
81+ (void ) S ;
82+
83+ STATE0 = vld1q_u32 (& state [0 ]);
84+ STATE1 = vld1q_u32 (& state [4 ]);
85+
86+ ABCD_SAVE = STATE0 ;
87+ EFGH_SAVE = STATE1 ;
88+
89+ MSG0 = vreinterpretq_u32_u8 (vrev32q_u8 (vld1q_u8 (& block [0 ])));
90+ MSG1 = vreinterpretq_u32_u8 (vrev32q_u8 (vld1q_u8 (& block [16 ])));
91+ MSG2 = vreinterpretq_u32_u8 (vrev32q_u8 (vld1q_u8 (& block [32 ])));
92+ MSG3 = vreinterpretq_u32_u8 (vrev32q_u8 (vld1q_u8 (& block [48 ])));
93+
94+ TMP0 = vaddq_u32 (MSG0 , vld1q_u32 (& Krnd [0 ]));
95+ TMP2 = STATE0 ;
96+ STATE0 = vsha256hq_u32 (STATE0 , STATE1 , TMP0 );
97+ STATE1 = vsha256h2q_u32 (STATE1 , TMP2 , TMP0 );
98+ MSG0 = vsha256su0q_u32 (MSG0 , MSG1 );
99+
100+ TMP1 = vaddq_u32 (MSG1 , vld1q_u32 (& Krnd [4 ]));
101+ TMP2 = STATE0 ;
102+ STATE0 = vsha256hq_u32 (STATE0 , STATE1 , TMP1 );
103+ STATE1 = vsha256h2q_u32 (STATE1 , TMP2 , TMP1 );
104+ MSG0 = vsha256su1q_u32 (MSG0 , MSG2 , MSG3 );
105+ MSG1 = vsha256su0q_u32 (MSG1 , MSG2 );
106+
107+ TMP0 = vaddq_u32 (MSG2 , vld1q_u32 (& Krnd [8 ]));
108+ TMP2 = STATE0 ;
109+ STATE0 = vsha256hq_u32 (STATE0 , STATE1 , TMP0 );
110+ STATE1 = vsha256h2q_u32 (STATE1 , TMP2 , TMP0 );
111+ MSG1 = vsha256su1q_u32 (MSG1 , MSG3 , MSG0 );
112+ MSG2 = vsha256su0q_u32 (MSG2 , MSG3 );
113+
114+ TMP1 = vaddq_u32 (MSG3 , vld1q_u32 (& Krnd [12 ]));
115+ TMP2 = STATE0 ;
116+ STATE0 = vsha256hq_u32 (STATE0 , STATE1 , TMP1 );
117+ STATE1 = vsha256h2q_u32 (STATE1 , TMP2 , TMP1 );
118+ MSG2 = vsha256su1q_u32 (MSG2 , MSG0 , MSG1 );
119+ MSG3 = vsha256su0q_u32 (MSG3 , MSG0 );
120+
121+ TMP0 = vaddq_u32 (MSG0 , vld1q_u32 (& Krnd [16 ]));
122+ TMP2 = STATE0 ;
123+ STATE0 = vsha256hq_u32 (STATE0 , STATE1 , TMP0 );
124+ STATE1 = vsha256h2q_u32 (STATE1 , TMP2 , TMP0 );
125+ MSG3 = vsha256su1q_u32 (MSG3 , MSG1 , MSG2 );
126+ MSG0 = vsha256su0q_u32 (MSG0 , MSG1 );
127+
128+ TMP1 = vaddq_u32 (MSG1 , vld1q_u32 (& Krnd [20 ]));
129+ TMP2 = STATE0 ;
130+ STATE0 = vsha256hq_u32 (STATE0 , STATE1 , TMP1 );
131+ STATE1 = vsha256h2q_u32 (STATE1 , TMP2 , TMP1 );
132+ MSG0 = vsha256su1q_u32 (MSG0 , MSG2 , MSG3 );
133+ MSG1 = vsha256su0q_u32 (MSG1 , MSG2 );
134+
135+ TMP0 = vaddq_u32 (MSG2 , vld1q_u32 (& Krnd [24 ]));
136+ TMP2 = STATE0 ;
137+ STATE0 = vsha256hq_u32 (STATE0 , STATE1 , TMP0 );
138+ STATE1 = vsha256h2q_u32 (STATE1 , TMP2 , TMP0 );
139+ MSG1 = vsha256su1q_u32 (MSG1 , MSG3 , MSG0 );
140+ MSG2 = vsha256su0q_u32 (MSG2 , MSG3 );
141+
142+ TMP1 = vaddq_u32 (MSG3 , vld1q_u32 (& Krnd [28 ]));
143+ TMP2 = STATE0 ;
144+ STATE0 = vsha256hq_u32 (STATE0 , STATE1 , TMP1 );
145+ STATE1 = vsha256h2q_u32 (STATE1 , TMP2 , TMP1 );
146+ MSG2 = vsha256su1q_u32 (MSG2 , MSG0 , MSG1 );
147+ MSG3 = vsha256su0q_u32 (MSG3 , MSG0 );
148+
149+ TMP0 = vaddq_u32 (MSG0 , vld1q_u32 (& Krnd [32 ]));
150+ TMP2 = STATE0 ;
151+ STATE0 = vsha256hq_u32 (STATE0 , STATE1 , TMP0 );
152+ STATE1 = vsha256h2q_u32 (STATE1 , TMP2 , TMP0 );
153+ MSG3 = vsha256su1q_u32 (MSG3 , MSG1 , MSG2 );
154+ MSG0 = vsha256su0q_u32 (MSG0 , MSG1 );
155+
156+ TMP1 = vaddq_u32 (MSG1 , vld1q_u32 (& Krnd [36 ]));
157+ TMP2 = STATE0 ;
158+ STATE0 = vsha256hq_u32 (STATE0 , STATE1 , TMP1 );
159+ STATE1 = vsha256h2q_u32 (STATE1 , TMP2 , TMP1 );
160+ MSG0 = vsha256su1q_u32 (MSG0 , MSG2 , MSG3 );
161+ MSG1 = vsha256su0q_u32 (MSG1 , MSG2 );
162+
163+ TMP0 = vaddq_u32 (MSG2 , vld1q_u32 (& Krnd [40 ]));
164+ TMP2 = STATE0 ;
165+ STATE0 = vsha256hq_u32 (STATE0 , STATE1 , TMP0 );
166+ STATE1 = vsha256h2q_u32 (STATE1 , TMP2 , TMP0 );
167+ MSG1 = vsha256su1q_u32 (MSG1 , MSG3 , MSG0 );
168+ MSG2 = vsha256su0q_u32 (MSG2 , MSG3 );
169+
170+ TMP1 = vaddq_u32 (MSG3 , vld1q_u32 (& Krnd [44 ]));
171+ TMP2 = STATE0 ;
172+ STATE0 = vsha256hq_u32 (STATE0 , STATE1 , TMP1 );
173+ STATE1 = vsha256h2q_u32 (STATE1 , TMP2 , TMP1 );
174+ MSG2 = vsha256su1q_u32 (MSG2 , MSG0 , MSG1 );
175+ MSG3 = vsha256su0q_u32 (MSG3 , MSG0 );
176+
177+ TMP0 = vaddq_u32 (MSG0 , vld1q_u32 (& Krnd [48 ]));
178+ TMP2 = STATE0 ;
179+ STATE0 = vsha256hq_u32 (STATE0 , STATE1 , TMP0 );
180+ STATE1 = vsha256h2q_u32 (STATE1 , TMP2 , TMP0 );
181+ MSG3 = vsha256su1q_u32 (MSG3 , MSG1 , MSG2 );
182+
183+ TMP1 = vaddq_u32 (MSG1 , vld1q_u32 (& Krnd [52 ]));
184+ TMP2 = STATE0 ;
185+ STATE0 = vsha256hq_u32 (STATE0 , STATE1 , TMP1 );
186+ STATE1 = vsha256h2q_u32 (STATE1 , TMP2 , TMP1 );
187+
188+ TMP0 = vaddq_u32 (MSG2 , vld1q_u32 (& Krnd [56 ]));
189+ TMP2 = STATE0 ;
190+ STATE0 = vsha256hq_u32 (STATE0 , STATE1 , TMP0 );
191+ STATE1 = vsha256h2q_u32 (STATE1 , TMP2 , TMP0 );
192+
193+ TMP1 = vaddq_u32 (MSG3 , vld1q_u32 (& Krnd [60 ]));
194+ TMP2 = STATE0 ;
195+ STATE0 = vsha256hq_u32 (STATE0 , STATE1 , TMP1 );
196+ STATE1 = vsha256h2q_u32 (STATE1 , TMP2 , TMP1 );
197+
198+ STATE0 = vaddq_u32 (STATE0 , ABCD_SAVE );
199+ STATE1 = vaddq_u32 (STATE1 , EFGH_SAVE );
200+
201+ vst1q_u32 (& state [0 ], STATE0 );
202+ vst1q_u32 (& state [4 ], STATE1 );
203+ }
204+
205+ #else
206+
50207static void
51208be32dec_vect (uint32_t * dst , const unsigned char * src , size_t len )
52209{
@@ -144,6 +301,8 @@ SHA256_Transform(uint32_t state[8], const uint8_t block[64], uint32_t W[64],
144301 }
145302}
146303
304+ #endif
305+
147306static const uint8_t PAD [64 ] = { 0x80 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ,
148307 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ,
149308 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ,
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