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drivers: dac: Add driver support for TI MSPM0 G-Series DAC module
Add support for the DAC module on TI’s MSPM0 G-Series MCUs. The DAC supports 8-bit and 12-bit resolution, with configurable input data format (binary or two’s complement). Signed-off-by: Santhosh Charles <[email protected]>
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‎drivers/dac/CMakeLists.txt‎

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@@ -30,3 +30,4 @@ zephyr_library_sources_ifdef(CONFIG_DAC_MCUX_GAU dac_mcux_gau.c)
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zephyr_library_sources_ifdef(CONFIG_DAC_TEST dac_test.c)
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zephyr_library_sources_ifdef(CONFIG_DAC_MAX22017 dac_max22017.c)
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zephyr_library_sources_ifdef(CONFIG_DAC_RENESAS_RA dac_renesas_ra.c)
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zephyr_library_sources_ifdef(CONFIG_DAC_MSPM0 dac_mspm0.c)

‎drivers/dac/Kconfig‎

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@@ -69,4 +69,6 @@ source "drivers/dac/Kconfig.renesas_ra"
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source "drivers/dac/Kconfig.samd5x"
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source "drivers/dac/Kconfig.mspm0"
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endif # DAC

‎drivers/dac/Kconfig.mspm0‎

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# TI MSPM0 DAC Driver Configuration
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# Copyright (c) 2025 Linumiz GmbH
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# SPDX-License-Identifier: Apache-2.0
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config DAC_MSPM0
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bool "TI MSPM0 Digital To Analog Converter (DAC) Driver"
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default y
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depends on DT_HAS_TI_MSPM0_DAC_ENABLED
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select USE_MSPM0_DL_DAC12
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help
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Enable support for the DAC (Digital-to-Analog Converter)
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peripheral driver for Texas Instruments MSPM0 G-Series MCUs.
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config DAC_MSPM0_DFM_TWOS_COMPLEMENT
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bool "Select two's complement as input data format"
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default n
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depends on DAC_MSPM0
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help
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Enable two's complement representation for DAC input
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data. If disabled, binary representation will be used.
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config DAC_MSPM0_TIMEOUT_MS
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int "DAC MSPM0 module ready timeout in milliseconds"
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default 50
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help
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Timeout in milliseconds to wait for the DAC module to be
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ready after enabling.

‎drivers/dac/dac_mspm0.c‎

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/*
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* Copyright (c) 2025 Linumiz GmbH
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT ti_mspm0_dac
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#include <zephyr/device.h>
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#include <zephyr/devicetree.h>
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#include <zephyr/drivers/dac.h>
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#include <zephyr/irq.h>
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#include <zephyr/kernel.h>
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/* TI Driverlib includes */
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#include <ti/devices/msp/peripherals/hw_dac12.h>
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#include <ti/driverlib/dl_dac12.h>
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/* 12-bit DAC Binary Representation Range */
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#define DAC12_BINARY_MAX 4095
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#define DAC12_BINARY_MIN 0
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/* 12-bit DAC Two's Complement Representation Range */
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#define DAC12_TWOS_COMP_MAX 2047
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#define DAC12_TWOS_COMP_MIN (-2048)
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/* 8-bit DAC Binary Representation Range */
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#define DAC8_BINARY_MAX 255
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#define DAC8_BINARY_MIN 0
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/* 8-bit DAC Two's Complement Representation Range */
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#define DAC8_TWOS_COMP_MAX 127
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#define DAC8_TWOS_COMP_MIN (-128)
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/* Timeout to wait until the DAC module is ready after enabling */
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#define DAC_MOD_RDY_TIMEOUT K_MSEC(CONFIG_DAC_MSPM0_TIMEOUT_MS)
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struct dac_mspm0_config {
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DAC12_Regs *dac_base;
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DL_DAC12_REPRESENTATION dac_repr;
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void (*irq_config_func)(const struct device *dev);
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};
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struct dac_mspm0_data {
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uint8_t resolution;
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struct k_sem mod_rdy;
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};
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static void dac_mspm0_isr(const struct device *dev)
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{
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const struct dac_mspm0_config *config = dev->config;
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struct dac_mspm0_data *data = dev->data;
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DAC12_Regs *dac12 = config->dac_base;
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if (DL_DAC12_getPendingInterrupt(dac12) == DL_DAC12_IIDX_MODULE_READY) {
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k_sem_give(&data->mod_rdy);
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}
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}
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static int dac_mspm0_channel_setup(const struct device *dev,
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const struct dac_channel_cfg *channel_cfg)
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{
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const struct dac_mspm0_config *config = dev->config;
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struct dac_mspm0_data *data = dev->data;
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DAC12_Regs *dac12 = config->dac_base;
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if (channel_cfg->channel_id != 0) {
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return -EINVAL;
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}
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if (channel_cfg->resolution != 8 && channel_cfg->resolution != 12) {
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return -ENOTSUP;
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}
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k_sem_reset(&data->mod_rdy);
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/* Ensure DAC is disabled before configuration */
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if (DL_DAC12_isEnabled(dac12)) {
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DL_DAC12_disable(dac12);
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}
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DL_DAC12_configDataFormat(dac12, config->dac_repr,
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(channel_cfg->resolution == 12) ? DL_DAC12_RESOLUTION_12BIT
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: DL_DAC12_RESOLUTION_8BIT);
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/* buffered must be true to enable amplifier for output drive */
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DL_DAC12_setAmplifier(dac12,
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(channel_cfg->buffered) ? DL_DAC12_AMP_ON : DL_DAC12_AMP_OFF_0V);
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DL_DAC12_setReferenceVoltageSource(dac12, DL_DAC12_VREF_SOURCE_VDDA_VSSA);
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/* internal must be true to route output to OPA, ADC, COMP and DAC_OUT pin */
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if (channel_cfg->internal) {
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DL_DAC12_enableOutputPin(dac12);
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} else {
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DL_DAC12_disableOutputPin(dac12);
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}
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DL_DAC12_enable(dac12);
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if (!DL_DAC12_isEnabled(dac12)) {
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return -EAGAIN;
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}
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if (k_sem_take(&data->mod_rdy, DAC_MOD_RDY_TIMEOUT) != 0) {
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return -ETIMEDOUT;
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}
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data->resolution = channel_cfg->resolution;
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DL_DAC12_performSelfCalibrationBlocking(dac12);
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return 0;
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}
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static int dac_mspm0_write_value(const struct device *dev, uint8_t channel, uint32_t value)
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{
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const struct dac_mspm0_config *config = dev->config;
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struct dac_mspm0_data *data = dev->data;
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DAC12_Regs *dac12 = config->dac_base;
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if (!DL_DAC12_isEnabled(dac12)) {
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return -EAGAIN;
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}
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if (channel != 0) {
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return -EINVAL;
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}
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if (data->resolution == 12) {
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if ((config->dac_repr == DL_DAC12_REPRESENTATION_BINARY) &&
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(value > DAC12_BINARY_MAX || value < DAC12_BINARY_MIN)) {
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return -EINVAL;
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}
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if ((config->dac_repr == DL_DAC12_REPRESENTATION_TWOS_COMPLEMENT) &&
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((int32_t)value > DAC12_TWOS_COMP_MAX ||
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(int32_t)value < DAC12_TWOS_COMP_MIN)) {
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return -EINVAL;
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}
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DL_DAC12_output12(dac12, value);
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} else if (data->resolution == 8) {
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if ((config->dac_repr == DL_DAC12_REPRESENTATION_BINARY) &&
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(value > DAC8_BINARY_MAX || value < DAC8_BINARY_MIN)) {
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return -EINVAL;
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}
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if ((config->dac_repr == DL_DAC12_REPRESENTATION_TWOS_COMPLEMENT) &&
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((int32_t)value > DAC8_TWOS_COMP_MAX || (int32_t)value < DAC8_TWOS_COMP_MIN)) {
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return -EINVAL;
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}
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DL_DAC12_output8(dac12, (uint8_t)value);
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} else {
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/* Setup must be done with valid resolution */
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return -EINVAL;
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}
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return 0;
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}
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static int dac_mspm0_init(const struct device *dev)
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{
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const struct dac_mspm0_config *config = dev->config;
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struct dac_mspm0_data *data = dev->data;
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DAC12_Regs *dac12 = config->dac_base;
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DL_DAC12_enablePower(dac12);
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if (!DL_DAC12_isPowerEnabled(dac12)) {
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return -EAGAIN;
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}
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DL_DAC12_disableInterrupt(dac12, DL_DAC12_INTERRUPT_MODULE_READY);
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DL_DAC12_clearInterruptStatus(dac12, DL_DAC12_INTERRUPT_MODULE_READY);
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config->irq_config_func(dev);
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DL_DAC12_enableInterrupt(dac12, DL_DAC12_INTERRUPT_MODULE_READY);
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return 0;
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}
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static DEVICE_API(dac, dac_mspm0_driver_api) = {
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.channel_setup = dac_mspm0_channel_setup,
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.write_value = dac_mspm0_write_value
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};
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#define DAC_MSPM0_DEFINE(id) \
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\
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static void dac_mspm0_irq_config_##id(const struct device *dev) \
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{ \
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IRQ_CONNECT(DT_INST_IRQN(id), DT_INST_IRQ(id, priority), dac_mspm0_isr, \
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DEVICE_DT_INST_GET(id), 0); \
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irq_enable(DT_INST_IRQN(id)); \
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}; \
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\
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static const struct dac_mspm0_config dac_mspm0_config_##id = { \
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.dac_base = (DAC12_Regs *)DT_INST_REG_ADDR(id), \
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\
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.dac_repr = IS_ENABLED(CONFIG_DAC_MSPM0_DFM_TWOS_COMPLEMENT) \
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? DL_DAC12_REPRESENTATION_TWOS_COMPLEMENT \
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: DL_DAC12_REPRESENTATION_BINARY, \
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.irq_config_func = dac_mspm0_irq_config_##id, \
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}; \
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\
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static struct dac_mspm0_data dac_mspm0_data_##id = { \
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/* Config at channel setup */ \
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.resolution = 0, \
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.mod_rdy = Z_SEM_INITIALIZER(dac_mspm0_data_##id.mod_rdy, 0, 1), \
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}; \
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\
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DEVICE_DT_INST_DEFINE(id, &dac_mspm0_init, NULL, &dac_mspm0_data_##id, \
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&dac_mspm0_config_##id, POST_KERNEL, CONFIG_DAC_INIT_PRIORITY, \
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&dac_mspm0_driver_api);
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DT_INST_FOREACH_STATUS_OKAY(DAC_MSPM0_DEFINE)

‎modules/Kconfig.mspm0‎

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@@ -14,3 +14,6 @@ config USE_MSPM0_DL_UART
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config USE_MSPM0_DL_TIMER
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bool
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config USE_MSPM0_DL_DAC12
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bool

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