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nihalpashamnihalpasham
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fix(hal/imx8mn): fix for uSDHC driver, sending sd-cmds now works
1 parent 6dcad2e commit 8437fd2

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7 files changed

+192
-313
lines changed

7 files changed

+192
-313
lines changed

‎boards/bootloaders/imx8mn/debug.md‎

Lines changed: 41 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -8,29 +8,46 @@ Port /dev/tty.usbserial-1101, 11:47:54
88
99
Press Meta-Z for help on special keys
1010
11-
[ 0.000249] imx8mn-rs version 0.1.0
12-
[ 0.003708] Booting on: i.MX 8M Nano EVK
13-
[ 0.007704] Current privilege level: EL3
14-
[ 0.011687] Exception handling state:
15-
[ 0.015486] Debug: Masked
16-
[ 0.018770] SError: Unmasked
17-
[ 0.022237] IRQ: Masked
18-
[ 0.025530] FIQ: Masked
19-
[ 0.028797] Drivers loaded:
20-
[ 0.031522] 1. i.MX8M Uart2
21-
[ 0.034975] Chars written: 382
22-
[ 0.038089] uSDHC2 has support for 1.8v, 3.0v, 3.3v ...
23-
[ 0.043339] Sd host circuit reset in 4us
24-
[ 0.047362] Sd clock stablized in 38us
25-
[ 0.051125] Prescaler = 64, Divisor = 16, Freq Set = 390625
26-
[ 0.057011] Sd: sending command, CMD_NAME: "GO_IDLE_STATE", CMD_CODE: 0x00000000, CMD_ARG: 0x00000000
27-
[ 0.069780] Sd: sending command, CMD_NAME: "SEND_IF_COND", CMD_CODE: 0x081a0000, CMD_ARG: 0x000001aa
28-
[ 0.084405] Error: we got a response for the last cmd but it contains errors, decode contents of interrupt status register for details
29-
VendSpec: 0x20007879, SysCtrl: 0x008f20ff, ProtCtrl: 0x08800020, PresentStatus: 0xf0058088, intStatus: 0x000c8001, Resp0: 0x00000000, Resp1: 0x00000000,
30-
Resp2: 0x00000000, Resp3: 0x00000000, CC_bit set in 4084us
11+
[ 0.000005] imx8mn-rs version 0.1.0
12+
[ 0.003584] Booting on: i.MX 8M Nano EVK
13+
[ 0.007607] Current privilege level: EL3
14+
[ 0.011545] Exception handling state:
15+
[ 0.015345] Debug: Masked
16+
[ 0.018591] SError: Unmasked
17+
[ 0.022112] IRQ: Masked
18+
[ 0.025395] FIQ: Masked
19+
[ 0.028603] Drivers loaded:
20+
[ 0.031523] 1. i.MX8M Uart2
21+
[ 0.034965] Chars written: 382
22+
[ 0.037976] uSDHC2 supports 1.8v, 3.0v, 3.3v ...
23+
[ 0.042765] Sd clock stablized in 38us
24+
[ 0.046555] Prescaler = 64, Divisor = 16, Freq = 390625 Hz
25+
[ 0.052420] Sd: sending command, CMD_NAME: "GO_IDLE_STATE", CMD_CODE: 0x00000000, CMD_ARG: 0x00000000
26+
[ 0.065373] Sd: sending command, CMD_NAME: "SEND_IF_COND", CMD_CODE: 0x081a0000, CMD_ARG: 0x000001aa
27+
[ 0.076527] Sd: sending command, CMD_NAME: "APP_CMD", CMD_CODE: 0x371a0000, CMD_ARG: 0x00000000
28+
[ 0.087369] Sd: sending command, CMD_NAME: "APP_SEND_OP_COND", CMD_CODE: 0x29020000, CMD_ARG: 0x50ff8000
29+
[ 0.499191] Sd: sending command, CMD_NAME: "APP_CMD", CMD_CODE: 0x371a0000, CMD_ARG: 0x00000000
30+
[ 0.509984] Sd: sending command, CMD_NAME: "APP_SEND_OP_COND", CMD_CODE: 0x29020000, CMD_ARG: 0x50ff8000
31+
[ 0.521794] Sd: sending command, CMD_NAME: "ALL_SEND_CID", CMD_CODE: 0x02090000, CMD_ARG: 0x00000000
32+
[ 0.533471] Sd: sending command, CMD_NAME: "SEND_REL_ADDR", CMD_CODE: 0x03020000, CMD_ARG: 0x00000000
33+
[ 0.544576] Sd: sending command, CMD_NAME: "SEND_CSD", CMD_CODE: 0x09010000, CMD_ARG: 0x00010000
34+
[ 0.555735] CSD Contents : 00 40 0e 00 32 5b 59 00 003b 83 7f 80 0a 40 00
35+
[ 0.562789] cemmc_structure=1, spec_vers=0, taac=0x0E, nsac=0x00, tran_speed=0x32,ccc=0x05B5, read_bl_len=0x09, read_bl_partial=0b, write_blk_misalign=0b,read_blk_misalign=0b, dsr_imp=0b, sector_size =0x7F, erase_blk_en=1b
36+
[ 0.583485] CSD 2.0: ver2_c_size = 0x3BFF, card capacity: 7987527680 bytes or 7.99GiB
37+
[ 0.591571] wp_grp_size=0x0000000b, wp_grp_enable=0b, default_ecc=00b, r2w_factor=010b, write_bl_len=0x09, write_bl_partial=0b, file_format_grp=0, copy=0b, perm_write_protect=0b, tmp_write_protect=0b, file_format=0b ecc=00b
38+
[ 0.612260] Sd clock stablized in 0us
39+
[ 0.616093] Prescaler = 1, Divisor = 8, Freq = 50000000 Hz
40+
[ 0.621697] Sd: sending command, CMD_NAME: "CARD_SELECT", CMD_CODE: 0x07030000, CMD_ARG: 0x00010000
41+
[ 0.632286] Sd: sending command, CMD_NAME: "APP_CMD_RCA", CMD_CODE: 0x37020000, CMD_ARG: 0x00010000
42+
[ 0.642606] Sd: sending command, CMD_NAME: "SEND_SCR", CMD_CODE: 0x333a0000, CMD_ARG: 0x00000000
43+
[ 0.653013] SCR bus width: WIDTH_1_4
44+
[ 0.656649] Sd: sending command, CMD_NAME: "APP_CMD_RCA", CMD_CODE: 0x37020000, CMD_ARG: 0x00010000
45+
[ 0.667078] Sd: sending command, CMD_NAME: "SET_BUS_WIDTH", CMD_CODE: 0x06020000, CMD_ARG: 0x00010002
46+
[ 0.677648] Sd Bus width set to 4
47+
[ 0.680970] Sd: sending command, CMD_NAME: "SET_BLOCKLEN", CMD_CODE: 0x10000000, CMD_ARG: 0x00000200
48+
[ 0.691651] Sd Card: Type 2 HC, 7617Mb, mfr_id: 150, 'DE:SD', r2.0, mfr_date: 1/2021, serial: 0x424f0218, RCA: 0x0001
49+
[ 0.703020] uSDHC driver initialized
50+
[ 0.706679]
3151
32-
[ 0.118136] SdError: Send interface condition command (CMD8) returned an error
33-
[ 0.125688] failed to initialize
34-
[ 0.128972]
35-
[ 0.130618] ... wait forever
52+
[ 0.708156] ... wait forever
3653
```

‎boards/bootloaders/imx8mn/src/boot.rs‎

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@ use crate::kernel_init;
66
use crate::{
77
clocks, exception, memory,
88
mux::{uart2grp::uart2_mux_mmio_set, usdhc2grp::usdhc2_mux_mmio_set},
9-
start_system_counter, sys_clocks_init,
9+
start_system_counter,
1010
};
1111

1212
// Assembly counterpart to this file.
@@ -26,8 +26,6 @@ pub unsafe extern "C" fn _start_rust() -> ! {
2626
clocks::scntrclk::enable_sctr();
2727
// start the system counter, this allows us to access ARM's architectural counter - CNTPCT_EL0
2828
start_system_counter();
29-
// initialize system clocks
30-
sys_clocks_init();
3129
// enable Uart and uSDHC clock
3230
clocks::uartclks::enable_uart_clk(1);
3331
clocks::usdhcclks::enable_usdhc_clk(2);

‎boards/bootloaders/imx8mn/src/main.rs‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -12,7 +12,7 @@ use rustBoot_hal::nxp::imx8mn::bsp::{
1212
clocks,
1313
drivers::{
1414
common::interface::DriverManager,
15-
driver_manager::{driver_manager, start_system_counter, sys_clocks_init},
15+
driver_manager::{driver_manager, start_system_counter},
1616
},
1717
global, mux,
1818
};
@@ -66,7 +66,7 @@ fn kernel_main() -> ! {
6666

6767
// init uSDHC
6868
match SDHC2.init_usdhc() {
69-
SdResult::SdOk => info!("uSDHC driver initialized"),
69+
SdResult::SdOk => info!("uSDHC driver initialized..."),
7070
_ => info!("failed to initialize"),
7171
}
7272

‎boards/hal/src/nxp/imx8mn/bsp/clocks/analog.rs‎

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,5 @@
1+
//! PLL configuration - TODO - implementation not ready yet
2+
13
use tock_registers::interfaces::ReadWriteable;
24
use tock_registers::{
35
interfaces::{Readable, Writeable},
@@ -351,6 +353,7 @@ impl CCMAnalog {
351353
+ SYS_PLL2_GEN_CTRL::PLL_DIV20_CLKE::SET,
352354
)
353355
}
356+
/// TODO: implementation not complete. Still needs to be tested
354357
pub fn pll_configure(&self, pll: PllClocks, freq: u32) {
355358
let pll_clke_masks = INTPLL_CLKE_MASK;
356359
// Bypass clock and set lock to pll output lock
@@ -434,7 +437,7 @@ impl CCMAnalog {
434437
_ => {}
435438
}
436439
}
437-
440+
/// TODO: implementation not complete. Still needs to be tested
438441
/// Configure system Plls and set clock-gates, root-clocks for GIC, DRAM, NAND, WDG etc.
439442
pub fn clock_init(&self) {
440443
self.set_pll1_outputs();

‎boards/hal/src/nxp/imx8mn/bsp/drivers/gpio.rs‎

Lines changed: 8 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -184,14 +184,13 @@ impl GpioInner {
184184

185185
/// Set GPIO pin
186186
fn set_gpio_pin(&mut self, pin: u8, val: bool) {
187-
// Set pin-direction to output
188-
self.registers
189-
.GPIO_GDIR
190-
.modify(GPIO_GDIR::PIN_DIR.val(1 << pin));
191-
192187
// set or clear DR bit for corresponding pin
193188
match val {
194189
true => {
190+
// Set pin-direction to output
191+
self.registers
192+
.GPIO_GDIR
193+
.modify(GPIO_GDIR::PIN_DIR.val(1 << pin));
195194
self.registers.GPIO_DR.modify(GPIO_DR::DR.val(1 << pin));
196195
}
197196
false => {
@@ -224,17 +223,17 @@ impl Gpio {
224223
inner: NullLock::new(GpioInner::new(mmio_start_addr)),
225224
}
226225
}
227-
/// Sets the supplied Gpio pin's state to output
226+
/// Sets the supplied Gpio pin's direction and state to output
228227
pub fn set_pin(&self, pin: u8) {
229-
self.inner.lock(|gpio | gpio.set_gpio_pin(pin, true));
228+
self.inner.lock(|gpio| gpio.set_gpio_pin(pin, true));
230229
}
231230
/// Clears the supplied Gpio pin's output-mode status
232231
pub fn clear_pin(&self, pin: u8) {
233-
self.inner.lock(|gpio | gpio.set_gpio_pin(pin, false));
232+
self.inner.lock(|gpio| gpio.set_gpio_pin(pin, false));
234233
}
235234
/// Reads the the supplied Gpio pin's state.
236235
pub fn read_pin(&self, pin: u8) -> u8 {
237-
let res = self.inner.lock(|gpio | gpio.get_gpio_pin(pin));
236+
let res = self.inner.lock(|gpio| gpio.get_gpio_pin(pin));
238237
res
239238
}
240239
}
@@ -247,4 +246,3 @@ impl super::common::interface::DeviceDriver for Gpio {
247246
"i.MX 8M Nano Gpio"
248247
}
249248
}
250-

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