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tests: bootloader: Add SB_CLEANUP_RAM tests
This commit adds tests to verify if the NSIB RAM cleanup functionality works as expected. Signed-off-by: Artur Hadasz <[email protected]>
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‎tests/subsys/bootloader/b0_ram_cleanup/CMakeLists.txt‎

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#
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# Copyright (c) 2025 Nordic Semiconductor
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#
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# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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#
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cmake_minimum_required(VERSION 3.20.0)
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find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
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project(NONE)
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FILE(GLOB app_sources src/*.c)
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target_sources(app PRIVATE ${app_sources})
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target_include_directories(app PRIVATE .)

‎tests/subsys/bootloader/b0_ram_cleanup/modules/b0_cleanup_ram_test_prepare/zephyr/CMakeLists.txt‎

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#
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# Copyright (c) 2025 Nordic Semiconductor
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#
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# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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#
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cmake_minimum_required(VERSION 3.20.0)
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zephyr_library()
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zephyr_library_sources(src/b0_cleanup_ram_test_prepare.c)

‎tests/subsys/bootloader/b0_ram_cleanup/modules/b0_cleanup_ram_test_prepare/zephyr/module.yml‎

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build:
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cmake: zephyr

‎tests/subsys/bootloader/b0_ram_cleanup/modules/b0_cleanup_ram_test_prepare/zephyr/src/b0_cleanup_ram_test_prepare.c‎

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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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#include <zephyr/init.h>
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#include <zephyr/device.h>
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#include <zephyr/sys/printk.h>
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#include <hal/nrf_timer.h>
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#include <zephyr/linker/linker-defs.h>
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#define CLEANUP_RAM_GAP_START ((uint32_t)__ramfunc_start)
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#define CLEANUP_RAM_GAP_END ((uint32_t) __ramfunc_end)
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/* Only the RAM outside of the defined linker sections will be populated,
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* as modifying the defined linker sections could lead to NSIB malfunction.
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*/
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#define RAM_TO_POPULATE_START ((uint32_t) _image_ram_end)
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#define RAM_TO_POPULATE_END (CONFIG_SRAM_SIZE * 1024)
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#define VALUE_TO_POPULATE 0xDEADBEAF
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/* As peripheral registers are not cleared during RAM cleanup, we can
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* use a register of a peripheral unused by NSIB to save data which can then
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* be read by the application.
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* We use this trick to save the start and end addresses of the RAMFUNC region.
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* This region is not erased during the RAM cleanup, as it contains the code responsible
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* for performing the RAM cleanup, so it must be skipped when checking if the RAM cleanup
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* has been successfully performed.
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* The TIMER00 is not used by NSIB, and is therefore its CC[0] and CC[1] registers
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* are used for this purpose.
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*/
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#define RAMFUNC_START_SAVE_REGISTER NRF_TIMER00->CC[0]
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#define RAMFUNC_END_SAVE_REGISTER NRF_TIMER00->CC[1]
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struct test_ram_area_t {
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uint32_t area_start;
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uint32_t area_end;
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};
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static int populate_ram(void)
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{
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RAMFUNC_START_SAVE_REGISTER = CLEANUP_RAM_GAP_START;
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RAMFUNC_END_SAVE_REGISTER = CLEANUP_RAM_GAP_END;
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for (uint32_t addr = RAM_TO_POPULATE_START; addr < RAM_TO_POPULATE_END;
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addr += sizeof(uint32_t)) {
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*(uint32_t *) addr = VALUE_TO_POPULATE;
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}
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return 0;
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}
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SYS_INIT(populate_ram, APPLICATION, CONFIG_APPLICATION_INIT_PRIORITY);

‎tests/subsys/bootloader/b0_ram_cleanup/prj.conf‎

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#
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# Copyright (c) 2025 Nordic Semiconductor ASA
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#
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# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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#
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CONFIG_ZTEST=y
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CONFIG_ARM_MPU=n
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CONFIG_SOC_EARLY_RESET_HOOK=y

‎tests/subsys/bootloader/b0_ram_cleanup/src/main.c‎

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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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#include <zephyr/ztest.h>
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#include <hal/nrf_timer.h>
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/* As peripheral registers are not cleared during RAM cleanup, we can
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* use a register of a peripheral unused by NSIB to save data which can then
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* be read by the application.
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* We use this trick to save the start and end addresses of the RAMFUNC region.
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* This region is not cleared during the RAM cleanup, as it contains the code responsible
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* for performing the RAM cleanup, so it must be skipped when checking if the RAM cleanup
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* has been successfully performed.
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* The TIMER00 is not used by NSIB, and is therefore its CC[0] and CC[1] registers
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* are used for this purpose.
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*/
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#define RAMFUNC_START_SAVE_REGISTER NRF_TIMER00->CC[0]
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#define RAMFUNC_END_SAVE_REGISTER NRF_TIMER00->CC[1]
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/* Using 2-byte magic values allows to load the whole value with movw */
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#define RAM_CLEANUP_SUCCESS_MAGIC 0x5678
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#define RAM_CLEANUP_FAILURE_MAGIC 0x4321
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static uint32_t __noinit ram_cleanup_result;
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static uint32_t __noinit uncleared_address;
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static uint32_t __noinit uncleared_value;
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/**
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* This hook needs to have the attribute __attribute__((naked)),
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* as otherwise the stack would be modified when calling it, leading to
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* test failure, as part of the RAM in which the stack resides wouldn't
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* be zeroed.
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*/
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__attribute__((naked)) void soc_early_reset_hook(void)
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{
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__asm__ volatile (
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/* Load zero (value used to clear memory) into r0 */
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" mov r0, #0\n"
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/* Explicitly clear the ram_cleanup_result variable */
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" mov r2, %6\n"
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" str r0, [r2]\n"
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/* Load the location of the saved ram func start address to r1 */
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" mov r1, %0\n"
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/* Load the ram func start address to r2 */
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" ldr r2, [r1]\n"
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/* Load the location of the saved ram func end address to r1 */
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" mov r1, %1\n"
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/* Load the ram func end address to r3*/
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" ldr r3, [r1]\n"
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/* Clear memory from ram func start to ram func end.
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* The area is skipped during the RAM cleanup,
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* so it is not cleared.
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* Simply cleaning it up here is quicker
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* than verifying if the current address is within the gap
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* in each iteration of the loop.
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*/
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"ram_func_zero_loop:\n"
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" cmp r2, r3\n"
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" bge ram_func_zero_loop_done\n"
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" str r0, [r2]\n"
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/* Increment the address by 4 (word size) */
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" add r2, r2, #4\n"
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" b ram_func_zero_loop\n"
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"ram_func_zero_loop_done:\n"
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/* Verify that all of the RAM memory has been cleared */
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/* Load SRAM base address to r1 */
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" mov r1, %2\n"
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/* Load SRAM size to r2 */
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" mov r2, %3\n"
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/* Calculate SRAM end address (base + size) */
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" add r2, r1, r2\n"
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"verify_ram_loop:\n"
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" cmp r1, r2\n"
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" bge verify_ram_done\n"
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/* Load value at current address and verify if it equals 0 */
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" ldr r3, [r1]\n"
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" cmp r3, #0\n"
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" bne ram_cleanup_failed\n"
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/* Increment the address by 4 (word size) */
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" add r1, r1, #4\n"
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" b verify_ram_loop\n"
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"ram_cleanup_failed:\n"
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/* Load RAM_CLEANUP_FAILURE_MAGIC into r0 */
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" movw r0, %4\n"
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/* Save the uncleared address in uncleared_address variable */
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" mov r2, %7\n"
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" str r1, [r2]\n"
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/* Save the uncleared value in uncleared_value variable */
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" mov r2, %8\n"
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" str r3, [r2]\n"
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" b verification_done\n"
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"verify_ram_done:\n"
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/* Load RAM_CLEANUP_SUCCESS_MAGIC */
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" movw r0, %5\n"
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"verification_done:\n"
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/* Store result in ram_cleanup_result variable */
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" mov r2, %6\n"
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" str r0, [r2]\n"
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/* __attribute__((naked)) requires manual branching */
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" bx lr\n"
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:
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: "r" (&RAMFUNC_START_SAVE_REGISTER),
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"r" (&RAMFUNC_END_SAVE_REGISTER),
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"r" (CONFIG_SRAM_BASE_ADDRESS),
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"r" (CONFIG_SRAM_SIZE * 1024),
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"i" (RAM_CLEANUP_FAILURE_MAGIC),
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"i" (RAM_CLEANUP_SUCCESS_MAGIC),
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"r" (&ram_cleanup_result),
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"r" (&uncleared_address),
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"r" (&uncleared_value)
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: "r0", "r1", "r2", "r3", "lr", "memory"
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);
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}
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ZTEST(b0_ram_cleanup, test_EARLY_RESET_HOOK)
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{
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zassert_true((ram_cleanup_result == RAM_CLEANUP_SUCCESS_MAGIC) ||
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(ram_cleanup_result == RAM_CLEANUP_FAILURE_MAGIC),
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"RAM cleanup result should be either success or failure");
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zassert_equal(ram_cleanup_result, RAM_CLEANUP_SUCCESS_MAGIC,
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"Uncleared word detected at address %p, value 0x%x", uncleared_address,
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uncleared_value);
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}
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ZTEST_SUITE(b0_ram_cleanup, NULL, NULL, NULL, NULL, NULL);

‎tests/subsys/bootloader/b0_ram_cleanup/sysbuild.cmake‎

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#
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# Copyright (c) 2025 Nordic Semiconductor
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#
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# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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#
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set(b0_EXTRA_ZEPHYR_MODULES ${CMAKE_CURRENT_LIST_DIR}/modules/b0_cleanup_ram_test_prepare CACHE INTERNAL "")

‎tests/subsys/bootloader/b0_ram_cleanup/sysbuild.conf‎

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#
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# Copyright (c) 2025 Nordic Semiconductor
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#
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# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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#
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SB_CONFIG_SECURE_BOOT_APPCORE=y
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SB_CONFIG_SECURE_BOOT_GENERATE_DEFAULT_KMU_KEYFILE=y

‎tests/subsys/bootloader/b0_ram_cleanup/testcase.yaml‎

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common:
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sysbuild: true
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tags:
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- b0
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- ci_tests_subsys_bootloader
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tests:
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b0.cleanup_ram:
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platform_allow:
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- nrf54l15dk/nrf54l15/cpuapp
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- nrf54l15dk/nrf54l10/cpuapp
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- nrf54l15dk/nrf54l05/cpuapp
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- nrf54lv10dk/nrf54lv10a/cpuapp
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- nrf54lm20dk/nrf54lm20a/cpuapp
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integration_platforms:
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- nrf54l15dk/nrf54l15/cpuapp
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- nrf54l15dk/nrf54l10/cpuapp
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- nrf54l15dk/nrf54l05/cpuapp
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- nrf54lv10dk/nrf54lv10a/cpuapp
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- nrf54lm20dk/nrf54lm20a/cpuapp

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