Basic handling of TAMPC

Signed-off-by: Vidar Lillebø <[email protected]>

Author: vlilleboe

platform/ext/target/nordic_nrf/common/core/faults.c

@@ -110,3 +110,15 @@ __attribute__((naked)) void MPC00_IRQHandler(void)
     );
 }
 #endif
+
+#ifdef NRF_TAMPC
+__attribute__((naked)) void TAMPC_IRQHandler(void)
+{
+    EXCEPTION_INFO();
+
+    __ASM volatile(
+        "BL        TAMPC_Handler             \n"
+        "B         .                       \n"
+    );
+}
+#endif

platform/ext/target/nordic_nrf/common/core/target_cfg.c

@@ -17,6 +17,8 @@
  */
 
 #include "target_cfg.h"
+#include "native_drivers/spu.h"
+#include "nrf54l15_enga_global.h"
 #include "region_defs.h"
 #include "tfm_plat_defs.h"
 #include "tfm_peripherals_config.h"
@@ -1134,6 +1136,9 @@ enum tfm_plat_err_t spu_periph_init_cfg(void)
 	/* Configure trace to be secure, as the security implications of non-secure trace are not understood */
 	spu_peripheral_config_secure(NRF_TAD_S_BASE, SPU_LOCK_CONF_LOCKED);
 
+
+    spu_peripheral_config_secure(NRF_RESET_S_BASE, SPU_LOCK_CONF_LOCKED);
+
 	/* Configure these HW features, which are not in the MDK, to be
 	 * secure, as the security implications of them being non-secure
 	 * are not understood

platform/ext/target/nordic_nrf/common/core/tfm_hal_platform_common.c

@@ -11,6 +11,8 @@
 #include "tfm_plat_defs.h"
 #include "uart_stdout.h"
 
+int init_tampc(void);
+
 extern const struct memory_region_limits memory_regions;
 enum tfm_hal_status_t tfm_hal_platform_common_init(void)
 {
@@ -46,6 +48,12 @@ enum tfm_hal_status_t tfm_hal_platform_common_init(void)
         return TFM_HAL_ERROR_GENERIC;
     }
 
+    /***/
+    plat_err = init_tampc();
+    if (plat_err != TFM_PLAT_ERR_SUCCESS) {
+        return TFM_HAL_ERROR_GENERIC;
+    }
+
     return TFM_HAL_SUCCESS;
 }
 

platform/ext/target/nordic_nrf/common/nrf54l15/CMakeLists.txt

@@ -22,6 +22,7 @@ target_include_directories(platform_s
 target_sources(platform_s
     PRIVATE
         ${HAL_NORDIC_PATH}/nrfx/mdk/system_nrf54l.c
+        tampc.c
 )
 
 target_compile_definitions(platform_s

platform/ext/target/nordic_nrf/common/nrf54l15/tampc.c

@@ -0,0 +1,62 @@
+
+/***
+
+
+*/
+
+#include "nrf54l15_enga_application.h"
+#include "nrf54l15_enga_global.h"
+#include "nrf54l15_enga_types.h"
+#include "tfm_hal_platform.h"
+#include "tfm_plat_defs.h"
+#include <hal/nrf_tampc.h>
+#include <helpers/nrfx_reset_reason.h>
+
+bool boot_reason_sectamper;
+
+#define RESET_BY_PERIPHERAL false
+#define TAMPER_EVENT_HANDLER tfm_core_panic
+
+int init_tampc(void) {
+
+#if 0
+  if (((volatile uint32_t *)0x5010E600)[0] & NRFX_RESET_REASON_SECTAMPER_MASK) {
+    ((volatile uint32_t *)0x5010E600)[0] = NRFX_RESET_REASON_SECTAMPER_MASK;
+    boot_reason_sectamper = true;
+  }
+#endif
+
+  nrf_tampc_event_clear(NRF_TAMPC, NRF_TAMPC_EVENT_WRITE_ERROR);
+  nrf_tampc_int_enable(NRF_TAMPC, NRF_TAMPC_ALL_INTS_MASK);
+
+  nrf_tampc_protector_ctrl_value_set(
+      NRF_TAMPC, NRF_TAMPC_PROTECT_GLITCH_DOMAIN_FAST, true);
+  nrf_tampc_protector_ctrl_value_set(
+      NRF_TAMPC, NRF_TAMPC_PROTECT_GLITCH_DOMAIN_SLOW, true);
+  nrf_tampc_protector_ctrl_value_set(NRF_TAMPC, NRF_TAMPC_PROTECT_RESETEN_INT,
+                                     RESET_BY_PERIPHERAL);
+
+  NVIC_ClearPendingIRQ(TAMPC_IRQn);
+  NVIC_ClearTargetState(TAMPC_IRQn);
+  NVIC_EnableIRQ(TAMPC_IRQn);
+
+  return TFM_PLAT_ERR_SUCCESS;
+}
+
+void TAMPC_Handler(void) {
+  SPMLOG_ERRMSG("TAMPC Exception:\r\n");
+
+  if (nrf_tampc_event_check(NRF_TAMPC, NRF_TAMPC_EVENT_WRITE_ERROR)) {
+    SPMLOG_ERRMSG("\tWrite error.\r\n");
+    nrf_tampc_event_clear(NRF_TAMPC, NRF_TAMPC_EVENT_WRITE_ERROR);
+    NVIC_ClearPendingIRQ(TAMPC_IRQn);
+    tfm_core_panic();
+  }
+
+  if (nrf_tampc_event_check(NRF_TAMPC, NRF_TAMPC_EVENT_TAMPER)) {
+    SPMLOG_ERRMSG("\tTamper event.\r\n");
+    nrf_tampc_event_clear(NRF_TAMPC, NRF_TAMPC_EVENT_TAMPER);
+    NVIC_ClearPendingIRQ(TAMPC_IRQn);
+    TAMPER_EVENT_HANDLER();
+  }
+}