From 3e6378cee63d2ddeab0d4e0c4533046c276e911c Mon Sep 17 00:00:00 2001 From: Ryutaro Okada Date: Mon, 2 Sep 2024 14:52:20 +0900 Subject: [PATCH] Fixes the issue adv7511_drv.c determines EDID read successfully when the DDC communication error has occurred. HDCP_ERROR_INT means HDCP/DDC controller error occurred, it does not mean EDID read success. However, the current implementation determines both ADV7511_INT0_EDID_READY and ADV7511_INT1_DDC_ERROR are EDID read successfully. ADV7511_INT1_DDC_ERROR should be handled as EDID read failed or EDID read timeout. The EDID read timeout sequence is already implemented in the adv7511_wait_for_edid(), so it is safe to ignore DDC_ERROR. --- drivers/gpu/drm/bridge/adv7511/adv7511_drv.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c index 36651170fb64..6af9ce376f96 100644 --- a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c +++ b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c @@ -486,7 +486,7 @@ static int adv7511_irq_process(struct adv7511 *adv7511, bool process_hpd) if (process_hpd && irq0 & ADV7511_INT0_HPD && adv7511->bridge.encoder) schedule_work(&adv7511->hpd_work); - if (irq0 & ADV7511_INT0_EDID_READY || irq1 & ADV7511_INT1_DDC_ERROR) { + if (irq0 & ADV7511_INT0_EDID_READY) { adv7511->edid_read = true; if (adv7511->i2c_main->irq)