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Lud1mathommythomaso
Lud1ma
authored and
thommythomaso
committed
treewide: Add multihead capabilities
1 parent b248755 commit c890feb

16 files changed

+444
-292
lines changed

‎src/backend/tpl/idma_backend.sv.tpl‎

Lines changed: 42 additions & 32 deletions
Original file line numberDiff line numberDiff line change
@@ -127,27 +127,27 @@ module idma_backend_${name_uniqueifier} #(
127127
% if database[protocol]['read_slave'] == 'true':
128128
_read\
129129
% endif
130-
_req_t ${protocol}_read_req_i,
130+
_req_t ${mh_format['ar'][protocol]}${protocol}_read_req_i,
131131
% else:
132132
output ${protocol}\
133133
% if database[protocol]['read_slave'] == 'true':
134134
_read\
135135
% endif
136-
_req_t ${protocol}_read_req_o,
136+
_req_t ${mh_format['ar'][protocol]}${protocol}_read_req_o,
137137
% endif
138138
/// ${database[protocol]['full_name']} read response
139139
% if database[protocol]['passive_req'] == 'true':
140140
output ${protocol}\
141141
% if database[protocol]['read_slave'] == 'true':
142142
_read\
143143
% endif
144-
_rsp_t ${protocol}_read_rsp_o,
144+
_rsp_t ${mh_format['ar'][protocol]}${protocol}_read_rsp_o,
145145
% else:
146146
input ${protocol}\
147147
% if database[protocol]['read_slave'] == 'true':
148148
_read\
149149
% endif
150-
_rsp_t ${protocol}_read_rsp_i,
150+
_rsp_t ${mh_format['ar'][protocol]}${protocol}_read_rsp_i,
151151
% endif
152152
% endfor
153153
% for protocol in used_write_protocols:
@@ -157,13 +157,13 @@ _rsp_t ${protocol}_read_rsp_i,
157157
% if database[protocol]['read_slave'] == 'true':
158158
_write\
159159
% endif
160-
_req_t ${protocol}_write_req_o,
160+
_req_t ${mh_format['aw'][protocol]}${protocol}_write_req_o,
161161
/// ${database[protocol]['full_name']} write response
162162
input ${protocol}\
163163
% if database[protocol]['read_slave'] == 'true':
164164
_write\
165165
% endif
166-
_rsp_t ${protocol}_write_rsp_i,
166+
_rsp_t ${mh_format['aw'][protocol]}${protocol}_write_rsp_i,
167167
% endfor
168168

169169
/// iDMA busy flags
@@ -198,12 +198,13 @@ _rsp_t ${protocol}_write_rsp_i,
198198
/// - `decouple_aw`: If the transfer has the AW decoupled from the R
199199
/// - `is_single`: Is this transfer just one beat long? `(len == 0)`
200200
typedef struct packed {
201-
idma_pkg::protocol_e src_protocol;
202-
offset_t offset;
203-
offset_t tailer;
204-
offset_t shift;
205-
logic decouple_aw;
206-
logic is_single;
201+
idma_pkg::protocol_e src_protocol;
202+
idma_pkg::multihead_t src_head;
203+
offset_t offset;
204+
offset_t tailer;
205+
offset_t shift;
206+
logic decouple_aw;
207+
logic is_single;
207208
} r_dp_req_t;
208209

209210
/// The datapath read response type provides feedback from the read part of the datapath:
@@ -225,12 +226,13 @@ _rsp_t ${protocol}_write_rsp_i,
225226
/// - `num_beats`: The number of beats this burst consist of
226227
/// - `is_single`: Is this transfer just one beat long? `(len == 0)`
227228
typedef struct packed {
228-
idma_pkg::protocol_e dst_protocol;
229-
offset_t offset;
230-
offset_t tailer;
231-
offset_t shift;
232-
axi_pkg::len_t num_beats;
233-
logic is_single;
229+
idma_pkg::protocol_e dst_protocol;
230+
idma_pkg::multihead_t dst_head;
231+
offset_t offset;
232+
offset_t tailer;
233+
offset_t shift;
234+
axi_pkg::len_t num_beats;
235+
logic is_single;
234236
} w_dp_req_t;
235237

236238
/// The datapath write response type provides feedback from the write part of the datapath:
@@ -248,8 +250,9 @@ _rsp_t ${protocol}_write_rsp_i,
248250
} idma_r_req_t;
249251
% if not one_read_port:
250252
typedef struct packed {
251-
idma_pkg::protocol_e src_protocol;
252-
read_meta_channel_t ar_req;
253+
idma_pkg::protocol_e src_protocol;
254+
idma_pkg::multihead_t src_head;
255+
read_meta_channel_t ar_req;
253256
} read_meta_channel_tagged_t;
254257
% endif
255258

@@ -268,8 +271,9 @@ _rsp_t ${protocol}_write_rsp_i,
268271
} idma_w_req_t;
269272
% if not one_write_port:
270273
typedef struct packed {
271-
idma_pkg::protocol_e dst_protocol;
272-
write_meta_channel_t aw_req;
274+
idma_pkg::protocol_e dst_protocol;
275+
idma_pkg::multihead_t dst_head;
276+
write_meta_channel_t aw_req;
273277
} write_meta_channel_tagged_t;
274278
% endif
275279

@@ -278,6 +282,8 @@ _rsp_t ${protocol}_write_rsp_i,
278282
typedef struct packed {
279283
idma_pkg::protocol_e src_protocol;
280284
idma_pkg::protocol_e dst_protocol;
285+
idma_pkg::multihead_t src_head;
286+
idma_pkg::multihead_t dst_head;
281287
offset_t read_shift;
282288
offset_t write_shift;
283289
logic decouple_rw;
@@ -469,21 +475,23 @@ _rsp_t ${protocol}_write_rsp_i,
469475
// assemble read datapath request
470476
assign r_req.r_dp_req = '{
471477
src_protocol: idma_req_i.opt.src_protocol,
472-
offset: idma_req_i.src_addr[OffsetWidth-1:0],
473-
tailer: OffsetWidth'(idma_req_i.length + idma_req_i.src_addr[OffsetWidth-1:0]),
474-
shift: OffsetWidth'(idma_req_i.src_addr[OffsetWidth-1:0]),
475-
decouple_aw: idma_req_i.opt.beo.decouple_aw,
476-
is_single: len == '0
478+
src_head: idma_req_i.opt.src_head,
479+
offset: idma_req_i.src_addr[OffsetWidth-1:0],
480+
tailer: OffsetWidth'(idma_req_i.length + idma_req_i.src_addr[OffsetWidth-1:0]),
481+
shift: OffsetWidth'(idma_req_i.src_addr[OffsetWidth-1:0]),
482+
decouple_aw: idma_req_i.opt.beo.decouple_aw,
483+
is_single: len == '0
477484
};
478485
479486
// assemble write datapath request
480487
assign w_req.w_dp_req = '{
481488
dst_protocol: idma_req_i.opt.dst_protocol,
482-
offset: idma_req_i.dst_addr[OffsetWidth-1:0],
483-
tailer: OffsetWidth'(idma_req_i.length + idma_req_i.dst_addr[OffsetWidth-1:0]),
484-
shift: OffsetWidth'(- idma_req_i.dst_addr[OffsetWidth-1:0]),
485-
num_beats: len,
486-
is_single: len == '0
489+
dst_head: idma_req_i.opt.src_head,
490+
offset: idma_req_i.dst_addr[OffsetWidth-1:0],
491+
tailer: OffsetWidth'(idma_req_i.length + idma_req_i.dst_addr[OffsetWidth-1:0]),
492+
shift: OffsetWidth'(- idma_req_i.dst_addr[OffsetWidth-1:0]),
493+
num_beats: len,
494+
is_single: len == '0
487495
};
488496
489497
// if the legalizer is bypassed; every burst is the last of the 1D transfer
@@ -632,6 +640,7 @@ _rsp_t ${protocol}_write_rsp_i,
632640
% if not one_read_port:
633641
always_comb begin : assign_r_meta_req
634642
r_meta_req_tagged.src_protocol = r_req.r_dp_req.src_protocol;
643+
r_meta_req_tagged.src_head = r_req.r_dp_req.src_head;
635644
r_meta_req_tagged.ar_req = r_req.ar_req;
636645
end
637646
% endif
@@ -780,6 +789,7 @@ _rsp_t ${protocol}_write_rsp_i,
780789
% if not one_write_port:
781790
always_comb begin : assign_tagged_w_req // need to have an always_comb block for Questa to not crap itself
782791
w_meta_req_tagged.dst_protocol = w_req.w_dp_req.dst_protocol;
792+
w_meta_req_tagged.dst_head = w_req.w_dp_req.dst_head;
783793
w_meta_req_tagged.aw_req = w_req.aw_req;
784794
end
785795
% endif

‎src/backend/tpl/idma_backend_synth.sv.tpl‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -95,6 +95,8 @@ module idma_backend_synth_${name_uniqueifier} #(
9595
input addr_t req_dst_addr_i,
9696
input idma_pkg::protocol_e req_src_protocol_i,
9797
input idma_pkg::protocol_e req_dst_protocol_i,
98+
input idma_pkg::multihead_t req_src_head_i,
99+
input idma_pkg::multihead_t req_dst_head_i,
98100
input id_t req_axi_id_i,
99101
input axi_pkg::burst_t req_src_burst_i,
100102
input axi_pkg::cache_t req_src_cache_i,
@@ -364,6 +366,8 @@ ${p}_${database[p]['write_meta_channel']}_width\
364366
assign idma_req.length = req_length_i;
365367
assign idma_req.opt.src_protocol = req_src_protocol_i;
366368
assign idma_req.opt.dst_protocol = req_dst_protocol_i;
369+
assign idma_req.opt.src_head = req_src_head_i;
370+
assign idma_req.opt.dst_head = req_dst_head_i;
367371
assign idma_req.opt.axi_id = req_axi_id_i;
368372
assign idma_req.opt.dst.cache = req_dst_cache_i;
369373
assign idma_req.opt.dst.burst = req_dst_burst_i;

‎src/backend/tpl/idma_legalizer.sv.tpl‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -476,6 +476,8 @@ w_num_bytes_to_pb = w_page_num_bytes_to_pb;
476476
opt_tf_d = '{
477477
src_protocol: req_i.opt.src_protocol,
478478
dst_protocol: req_i.opt.dst_protocol,
479+
src_head: req_i.opt.src_head,
480+
dst_head: req_i.opt.dst_head,
479481
read_shift: '0,
480482
write_shift: '0,
481483
decouple_rw: req_i.opt.beo.decouple_rw,
@@ -529,6 +531,7 @@ ${database[protocol]['legalizer_read_meta_channel']}
529531
// assign the signals needed to set-up the read data path
530532
assign r_req_o.r_dp_req = '{
531533
src_protocol: opt_tf_q.src_protocol,
534+
src_head: opt_tf_q.src_head,
532535
offset: r_addr_offset,
533536
tailer: OffsetWidth'(r_num_bytes + r_addr_offset),
534537
shift: opt_tf_q.read_shift,
@@ -545,6 +548,7 @@ ${database[used_write_protocols[0]]['legalizer_write_data_path']}
545548
% else:
546549
w_req_o.w_dp_req = '{
547550
dst_protocol: opt_tf_q.dst_protocol,
551+
dst_head: opt_tf_q.dst_head,
548552
offset: w_addr_offset,
549553
tailer: OffsetWidth'(w_num_bytes + w_addr_offset),
550554
shift: opt_tf_q.write_shift,
@@ -579,6 +583,7 @@ ${database[protocol]['legalizer_write_data_path']}
579583
default:
580584
w_req_o.w_dp_req = '{
581585
dst_protocol: opt_tf_q.dst_protocol,
586+
dst_head: opt_tf_q.dst_head,
582587
offset: w_addr_offset,
583588
tailer: OffsetWidth'(w_num_bytes + w_addr_offset),
584589
shift: opt_tf_q.write_shift,

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