Summary
Implement accurate Disk II hardware emulation to support copy-protected software and match real hardware behavior. Currently the Disk II controller uses a simplified digital model that works for standard DOS 3.3 and ProDOS disks but fails on software that relies on analog timing, half-tracks, or bit-level disk access.
Current Limitations
- No spin-up delay — motor reaches speed instantly; real hardware takes ~70ms
- No rotational position tracking — reads return the next sequential nibble regardless of timing; real disk spins continuously and read position depends on CPU cycle count
- Simplified stepper motor — single-step quarter-track increments only; real hardware supports half-track positioning from dual-phase magnet interactions
- Motor state doesn't gate reads — data is returned even when motor is off; real hardware returns garbage until motor is up to speed
- No write support through nibble path — only sector-level writes exist via
WriteSector
- .dsk only — sector-level images discard all timing, sync, and raw flux data
Proposed Implementation
Phase 1: Timing and Motor Accuracy
- Track motor state with spin-up/spin-down timing (~1 revolution to reach speed)
- Implement rotational position based on CPU cycle count (nibble stream position = total cycles modulo track length in cycles)
- Gate data reads on motor-running state (return random/zero when motor is off or spinning up)
Phase 2: Half-Track and Stepper Fidelity
- Model dual-phase magnet interactions for half-track positioning
- Support head positioning at any quarter-track (0-139), not just whole tracks
- Return appropriate data when head is between tracks (noise, partial reads, or half-track data if available)
Phase 3: .woz Disk Image Support
- Parse WOZ 1.0 and WOZ 2.0 file formats (bit stream per track, timing metadata)
- Support half-track data stored in .woz images
- Implement bit-level read/write using the raw flux stream instead of pre-nibblized sectors
- Preserve sync gaps, weak bits, and timing variations that copy protection relies on
Phase 4: Write Path
- Implement bit-level write through the shift register and data latch (Q6/Q7 state machine)
- Write nibble data back to the track buffer
- Support write-back to .woz images (and optionally .dsk with re-encoding)
Reference
Acceptance Criteria
Summary
Implement accurate Disk II hardware emulation to support copy-protected software and match real hardware behavior. Currently the Disk II controller uses a simplified digital model that works for standard DOS 3.3 and ProDOS disks but fails on software that relies on analog timing, half-tracks, or bit-level disk access.
Current Limitations
WriteSectorProposed Implementation
Phase 1: Timing and Motor Accuracy
Phase 2: Half-Track and Stepper Fidelity
Phase 3: .woz Disk Image Support
Phase 4: Write Path
Reference
Acceptance Criteria