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Update PlicExt design
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src/plic.rs

Lines changed: 8 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -13,13 +13,13 @@ use crate::pac::{PLIC, Interrupt};
1313
/// Extension trait for PLIC interrupt controller peripheral
1414
pub trait PlicExt {
1515
/// Interrupt wrapper type
16-
type Interrupt;
16+
type Interrupt: Nr;
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/// Is this M-Mode interrupt enabled on given hart?
1818
fn is_enabled(hart_id: usize, interrupt: Self::Interrupt) -> bool;
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/// Enable an interrupt for a given hart
20-
fn enable(hart_id: usize, interrupt: Self::Interrupt);
20+
unsafe fn unmask(hart_id: usize, interrupt: Self::Interrupt);
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/// Disable an interrupt for a given hart
22-
fn disable(hart_id: usize, interrupt: Self::Interrupt);
22+
fn mask(hart_id: usize, interrupt: Self::Interrupt);
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/// Get global priority for one interrupt
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fn get_priority(interrupt: Self::Interrupt) -> Priority;
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/// Globally set priority for one interrupt
@@ -45,15 +45,13 @@ impl PlicExt for PLIC {
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.read().bits() & 1 << (irq_number % 32) != 0
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}
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}
48-
fn enable(hart_id: usize, interrupt: Interrupt) {
48+
unsafe fn unmask(hart_id: usize, interrupt: Interrupt) {
4949
let irq_number = interrupt.into_bits() as usize;
50-
unsafe {
51-
(*PLIC::ptr()).target_enables[hart_id].enable[irq_number / 32]
52-
.modify(|r, w|
53-
w.bits(r.bits() | 1 << (irq_number % 32)));
54-
}
50+
(*PLIC::ptr()).target_enables[hart_id].enable[irq_number / 32]
51+
.modify(|r, w|
52+
w.bits(r.bits() | 1 << (irq_number % 32)));
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}
56-
fn disable(hart_id: usize, interrupt: Interrupt) {
54+
fn mask(hart_id: usize, interrupt: Interrupt) {
5755
let irq_number = interrupt.into_bits() as usize;
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unsafe {
5957
(*PLIC::ptr()).target_enables[hart_id].enable[irq_number / 32]

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