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src/mte_tag: add checktag instruction to Zimt spec
Signed-off-by: Deepak Gupta <[email protected]>
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src/mte_tag.adoc

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@@ -35,7 +35,7 @@ better clarity and will be used in the rest of the specification.
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Load and store operating on a page with permissions `--R`, `X-R`, `-WR` and
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`XWR` are termed as a `regular load` and `regular store`. Regular load and
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regular store memory operations are generated from an instruction (except
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`settag`) defined by ISA to perform memory accesses.
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`settag` and `checktag`) defined by ISA to perform memory accesses.
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==== Checked load and store
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Regular load and store which is subject to tag check is termed as checked load
@@ -295,6 +295,32 @@ local to a function. These accesses are deemed to be safe and thus are not
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subject to tag checks.
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=====
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==== Explicit tag check
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Zimt defines an explicit tag check instruction taken from `MOP.RR.1` of zimop
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extension, `checktag rs1, #chunk_count` which extracts `pointer_tag` from `rs1`
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and performs load tag operation for memory chunks (count = `#chunk_count`)
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starting at virtual address `rs1`. If any of the loaded `mc_tag` value(s)
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mismatches with the `pointer_tag` specified in `rs1`, then software check
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exception is raised with tval = 4. If memory tagging is enabled in the
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execution environment then `checktag` instruction always makes the check
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irrespective of `PTE.MTAG` bit setting for the code page from where `checktag`
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instuction is fetched or for data page virtual address specified in `rs1`. If
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memory tagging is disabled in the execution environment then `checktag`
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instruction reverts to zimop behavior.
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[wavedrom, ,svg]
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....
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{reg: [
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{bits: 7, name: 'opcode', attr:'SYSTEM'},
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{bits: 5, name: 'rd', attr:['00000']},
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{bits: 3, name: 'funct3', attr:['100']},
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{bits: 5, name: 'rs1', attr:['tagged_pointer']},
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{bits: 4, name: 'tag_imm4', attr:['chunk_count']},
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{bits: 1, name: '0', attr:['0']},
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{bits: 7, name: '1000011', attr:['gentag']},
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], config:{lanes: 1, hspace:1024}}
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....
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[[ASYNC_SW_CHECK]]
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=== Asynchronous reporting for tag mismatches
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