Merge pull request #82 from thejpster/fix-svc-handler

Fix SVC handler

Author: jonathanpallant

cortex-a-rt/src/lib.rs

@@ -704,7 +704,7 @@ core::arch::global_asm!(
     "#,
     save_context!(),
     r#"
-        mrs      r0, cpsr                 // Load processor status
+        mrs      r0, spsr                 // Load processor status
         tst      r0, {t_bit}              // Occurred in Thumb state?
         ldrhne   r0, [lr,#-2]             // Yes: Load halfword and...
         bicne    r0, r0, #0xFF00          // ...extract comment field

cortex-r-rt/src/lib.rs

@@ -639,7 +639,7 @@ core::arch::global_asm!(
     "#,
     save_context!(),
     r#"
-        mrs      r0, cpsr                 // Load processor status
+        mrs      r0, spsr                 // Load processor status
         tst      r0, {t_bit}              // Occurred in Thumb state?
         ldrhne   r0, [lr,#-2]             // Yes: Load halfword and...
         bicne    r0, r0, #0xFF00          // ...extract comment field

examples/mps3-an536/reference/svc-armv8r-none-eabihf.out renamed to examples/mps3-an536/reference/svc-a32-armv8r-none-eabihf.out

@@ -5,8 +5,8 @@ x = 1, y = 2, z = 3.000
 PANIC: PanicInfo {
     message: I am an example panic,
     location: Location {
-        file: "src/bin/svc.rs",
-        line: 25,
+        file: "src/bin/svc-a32.rs",
+        line: 23,
         column: 5,
     },
     can_unwind: true,

examples/mps3-an536/reference/svc-t32-armv8r-none-eabihf.out

@@ -0,0 +1,14 @@
+x = 1, y = 2, z = 3.000
+In svc_handler, with arg=0x000012
+In svc_handler, with arg=0x000034
+x = 1, y = 2, z = 3.000
+PANIC: PanicInfo {
+    message: I am an example panic,
+    location: Location {
+        file: "src/bin/svc-t32.rs",
+        line: 23,
+        column: 5,
+    },
+    can_unwind: true,
+    force_no_backtrace: false,
+}

examples/mps3-an536/src/bin/svc.rs renamed to examples/mps3-an536/src/bin/svc-a32.rs

@@ -1,19 +1,17 @@
-//! SVC (software interrupt) example for Arm Cortex-R
+//! SVC (software interrupt) example
 
 #![no_std]
 #![no_main]
 
 // pull in our start-up code
 use cortex_r_rt::{entry, exception};
 
-// pull in our library
-use mps3_an536 as _;
-
 use semihosting::println;
+use mps3_an536 as _;
 
 /// The entry-point to the Rust application.
 ///
-/// It is called by the start-up code in `cortex-r-rt`.
+/// It is called by the start-up.
 #[entry]
 fn main() -> ! {
     let x = 1;
@@ -28,7 +26,7 @@ fn main() -> ! {
 /// This is our SVC exception handler
 #[exception(SupervisorCall)]
 fn svc_handler(arg: u32) {
-    println!("In svc_handler, with arg={:#06x}", arg);
+    println!("In svc_handler, with arg=0x{:06x}", arg);
     if arg == 0xABCDEF {
         // test nested SVC calls
         cortex_ar::svc!(0x456789);

examples/mps3-an536/src/bin/svc-t32.rs

@@ -0,0 +1,64 @@
+//! SVC (software interrupt) example
+
+#![no_std]
+#![no_main]
+
+// pull in our start-up code
+use cortex_r_rt::{entry, exception};
+
+use semihosting::println;
+use mps3_an536 as _;
+
+/// The entry-point to the Rust application.
+///
+/// It is called by the start-up.
+#[entry]
+fn main() -> ! {
+    let x = 1;
+    let y = x + 1;
+    let z = (y as f64) * 1.5;
+    println!("x = {}, y = {}, z = {:0.3}", x, y, z);
+    unsafe { svc12_from_t32(); }
+    println!("x = {}, y = {}, z = {:0.3}", x, y, z);
+    panic!("I am an example panic");
+}
+
+/// This is our SVC exception handler
+#[exception(SupervisorCall)]
+fn svc_handler(arg: u32) {
+    println!("In svc_handler, with arg=0x{:06x}", arg);
+    if arg == 0x12 {
+        // test nested SVC calls
+        unsafe { svc34_from_t32(); }
+    }
+}
+
+// These functions are written in assembly
+extern "C" {
+    fn svc12_from_t32();
+    fn svc34_from_t32();
+}
+
+core::arch::global_asm!(
+    r#"
+    // fn svc12_from_t32();
+    .thumb
+    .global svc12_from_t32
+    .type svc12_from_t32, %function
+    svc12_from_t32:
+        push    {{ r7, lr }}
+        svc     0x12
+        pop     {{ r7, pc }}
+    .size svc12_from_t32, . - svc12_from_t32
+
+    // fn svc34_from_t32();
+    .thumb
+    .global svc34_from_t32
+    .type svc34_from_t32, %function
+    svc34_from_t32:
+        push    {{ r7, lr }}
+        svc     0x34
+        pop     {{ r7, pc }}
+    .size svc34_from_t32, . - svc34_from_t32
+"#
+);

examples/versatileab/reference/svc-armv7r-none-eabihf.out renamed to examples/versatileab/reference/svc-a32-armv7a-none-eabi.out

@@ -5,7 +5,7 @@ x = 1, y = 2, z = 3.000
 PANIC: PanicInfo {
     message: I am an example panic,
     location: Location {
-        file: "src/bin/svc.rs",
+        file: "src/bin/svc-a32.rs",
         line: 22,
         column: 5,
     },

examples/versatileab/reference/svc-armv7r-none-eabi.out renamed to examples/versatileab/reference/svc-a32-armv7a-none-eabihf.out

@@ -5,7 +5,7 @@ x = 1, y = 2, z = 3.000
 PANIC: PanicInfo {
     message: I am an example panic,
     location: Location {
-        file: "src/bin/svc.rs",
+        file: "src/bin/svc-a32.rs",
         line: 22,
         column: 5,
     },

examples/versatileab/reference/svc-armv7a-none-eabi.out renamed to examples/versatileab/reference/svc-a32-armv7r-none-eabi.out

@@ -5,7 +5,7 @@ x = 1, y = 2, z = 3.000
 PANIC: PanicInfo {
     message: I am an example panic,
     location: Location {
-        file: "src/bin/svc.rs",
+        file: "src/bin/svc-a32.rs",
         line: 22,
         column: 5,
     },

examples/versatileab/reference/svc-armv7a-none-eabihf.out renamed to examples/versatileab/reference/svc-a32-armv7r-none-eabihf.out

@@ -5,7 +5,7 @@ x = 1, y = 2, z = 3.000
 PANIC: PanicInfo {
     message: I am an example panic,
     location: Location {
-        file: "src/bin/svc.rs",
+        file: "src/bin/svc-a32.rs",
         line: 22,
         column: 5,
     },