Tracking issue for abi-cafe failures

[bjorn3]

https://github.com/rust-lang/rustc_codegen_cranelift/blob/master/patches/0002-abi-cafe-Disable-broken-tests.patch

• aarch64-unknown-linux-gnu
  • F32Array with extern "C"
  • OptionU128 with extern "Rust" and repr(C) (Return values larger than 2 registers using a return area pointer rust#131211)
• aarch64-apple-darwin
  • SingleVariantUnion with extern "C" and repr(C)
  • OptionU128 with extern "Rust" and repr(C)
• x86_64 unix
  • OptionU128 with extern "Rust" and repr(Rust) (Return values larger than 2 registers using a return area pointer rust#131211)
• x86_64-pc-windows-msvc
  • OptionU128 with extern "Rust" (Return values larger than 2 registers using a return area pointer rust#131211)
  • simple with extern "Rust"

[bjorn3]

rust-lang/rust#131211 which will be in next nightly fixed the OptionU128 issues on at least x86_64-unknown-linux-gnu and aarch64-unknown-linux-gnu and likely on macOS and Windows too.

[bjorn3]

On aarch64-unknown-linux-gnu

extern "C" {
    fn write_val(val: f32);
}

#[repr(C)]
#[derive(Copy, Clone)]
struct F32Array {
    field0: [f32; 4],
}

#[no_mangle]
pub unsafe extern "C" fn val_in_3(_: F32Array, _: F32Array, arg2: F32Array) {
    unsafe {
        write_val(arg2.field0[0]);
        write_val(arg2.field0[1]);
        write_val(arg2.field0[2]);
        write_val(arg2.field0[3]);
    }
}

produces the following LLVM ir:

define void @val_in_3([4 x float] %0, [4 x float] %1, [4 x float] %2) unnamed_addr #0 !dbg !6 {
  %.fca.0.extract9 = extractvalue [4 x float] %2, 0
  %.fca.1.extract10 = extractvalue [4 x float] %2, 1
  %.fca.2.extract11 = extractvalue [4 x float] %2, 2
  %.fca.3.extract12 = extractvalue [4 x float] %2, 3
  tail call void @write_val(float noundef %.fca.0.extract9) #1, !dbg !11
  tail call void @write_val(float noundef %.fca.1.extract10) #1, !dbg !12
  tail call void @write_val(float noundef %.fca.2.extract11) #1, !dbg !13
  tail call void @write_val(float noundef %.fca.3.extract12) #1, !dbg !14
  ret void, !dbg !15
}

declare void @write_val(float noundef) unnamed_addr #0

and the following clif ir:

function u0:0(f32, f32, f32, f32, f32, f32, f32, f32, f32, f32, f32, f32) system_v {
; kind  loc.idx   param    pass mode                            ty
; zst   _0    ()                                0b 1, 8              align=8,offset=
; ret   _0      -          Ignore                               ()
; arg   _1      = v0,v1,v2,v3 Cast { pad_i32: false, cast: CastTarget { prefix: [None, None, None, None, None, None, None, None], rest: Uniform { unit: Reg { kind: Float, size: Size(4 bytes) }, total: Size(16 bytes), is_consecutive: true }, attrs: ArgAttributes { regular: , arg_ext: None, pointee_size: Size(0 bytes), pointee_align: None } } } F32Array
; arg   _2      = v4,v5,v6,v7 Cast { pad_i32: false, cast: CastTarget { prefix: [None, None, None, None, None, None, None, None], rest: Uniform { unit: Reg { kind: Float, size: Size(4 bytes) }, total: Size(16 bytes), is_consecutive: true }, attrs: ArgAttributes { regular: , arg_ext: None, pointee_size: Size(0 bytes), pointee_align: None } } } F32Array
; arg   _3      = v8,v9,v10,v11 Cast { pad_i32: false, cast: CastTarget { prefix: [None, None, None, None, None, None, None, None], rest: Uniform { unit: Reg { kind: Float, size: Size(4 bytes) }, total: Size(16 bytes), is_consecutive: true }, attrs: ArgAttributes { regular: , arg_ext: None, pointee_size: Size(0 bytes), pointee_align: None } } } F32Array

; ........................
}

I'm pretty sure that the issue is that the [f32; 4] gets splatted into individual arguments which get a register or stack location assigned independently, while the ABI requires them to be assigned to either consecutive registers or to the stack as a whole.

Edit: Opened bytecodealliance/wasmtime#9509