Skip to content

Commit 3e43563

Browse files
authored
Merge pull request #1885 from 197g/maskmove-is-non-temporal
Add non-temporal note for maskmoveu_si128
2 parents ebe600f + 92b63ab commit 3e43563

File tree

1 file changed

+10
-1
lines changed

1 file changed

+10
-1
lines changed

crates/core_arch/src/x86/sse2.rs

Lines changed: 10 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1272,7 +1272,7 @@ pub unsafe fn _mm_loadu_si128(mem_addr: *const __m128i) -> __m128i {
12721272
}
12731273

12741274
/// Conditionally store 8-bit integer elements from `a` into memory using
1275-
/// `mask`.
1275+
/// `mask` flagged as non-temporal (unlikely to be used again soon).
12761276
///
12771277
/// Elements are not stored when the highest bit is not set in the
12781278
/// corresponding element.
@@ -1281,6 +1281,15 @@ pub unsafe fn _mm_loadu_si128(mem_addr: *const __m128i) -> __m128i {
12811281
/// to be aligned on any particular boundary.
12821282
///
12831283
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm_maskmoveu_si128)
1284+
///
1285+
/// # Safety of non-temporal stores
1286+
///
1287+
/// After using this intrinsic, but before any other access to the memory that this intrinsic
1288+
/// mutates, a call to [`_mm_sfence`] must be performed by the thread that used the intrinsic. In
1289+
/// particular, functions that call this intrinsic should generally call `_mm_sfence` before they
1290+
/// return.
1291+
///
1292+
/// See [`_mm_sfence`] for details.
12841293
#[inline]
12851294
#[target_feature(enable = "sse2")]
12861295
#[cfg_attr(test, assert_instr(maskmovdqu))]

0 commit comments

Comments
 (0)