manual: add x86 IRQ vector bound + priority note

Signed-off-by: Bill Nguyen <bill.nguyen@unsw.edu.au>

Author: dreamliner787-9

docs/manual.md

@@ -1021,7 +1021,7 @@ The `irq` element has the following attributes when registering X86_64 IOAPIC in
 
 * `id`: The channel identifier. Must be at least 0 and less than 63.
 * `pin`: IOAPIC pin that generates the interrupt.
-* `vector`: CPU vector to deliver the interrupt to.
+* `vector`: CPU vector to deliver the interrupt to. Must be at least 0 and less than 108. A high vector equals to a high priority.
 * `ioapic`: (optional) Zero based index of the IOAPIC to get the interrupt from. Defaults to 0.
 * `level`: (optional) Whether the IRQ is level triggered (1) or edge triggered (0). Defaults to level (1).
 * `polarity`: (optional) Whether the line polarity is high (1) or low (0). Defaults to high (1).
@@ -1032,7 +1032,7 @@ The `irq` element has the following attributes when registering X86_64 MSI inter
 * `id`: The channel identifier. Must be at least 0 and less than 63.
 * `pcidev`: The PCI device address of the device that will generate the interrupt in hexadecimal, in BUS:DEV.FUNC notation (e.g. 01:1f.2).
 * `handle`: Value of the handle programmed into the data portion of the MSI.
-* `vector`: CPU vector to deliver the interrupt to.
+* `vector`: CPU vector to deliver the interrupt to. Must be at least 0 and less than 108. A high vector equals to a high priority.
 * `setvar_id`: (optional) Specifies a symbol in the program image. This symbol will be rewritten with the channel identifier of the IRQ.
 
 The `ioport` element has the following attributes: