diff --git a/examples/button.rs b/examples/button.rs
index ef7990ec..7064e363 100644
--- a/examples/button.rs
+++ b/examples/button.rs
@@ -3,7 +3,7 @@
 
 use stm32g4xx_hal::{
     //delay::{DelayExt, SYSTDelayExt},
-    gpio::{gpioc, ExtiPin, GpioExt, Input, PullDown, SignalEdge},
+    gpio::{self, ExtiPin, GpioExt, Input, PullDown, SignalEdge},
     rcc::RccExt,
     stm32,
     stm32::{interrupt, Interrupt},
@@ -16,7 +16,7 @@ use cortex_m::{asm::wfi, interrupt::Mutex};
 use cortex_m_rt::entry;
 use embedded_hal::digital::OutputPin;
 
-type ButtonPin = gpioc::PC13<Input<PullDown>>;
+type ButtonPin = gpio::PC13<Input<PullDown>>;
 
 // Make LED pin globally available
 static G_BUTTON: Mutex<RefCell<Option<ButtonPin>>> = Mutex::new(RefCell::new(None));
diff --git a/examples/pwm.rs b/examples/pwm.rs
index cee8f7d7..9b94f527 100644
--- a/examples/pwm.rs
+++ b/examples/pwm.rs
@@ -3,9 +3,7 @@
 #![no_std]
 
 use cortex_m_rt::entry;
-use hal::gpio::gpioa::PA8;
-use hal::gpio::Alternate;
-use hal::gpio::AF6;
+use hal::gpio::{AF6, PA8};
 use hal::prelude::*;
 use hal::stm32;
 use hal::time::RateExtU32;
@@ -23,7 +21,7 @@ fn main() -> ! {
     let dp = stm32::Peripherals::take().expect("cannot take peripherals");
     let mut rcc = dp.RCC.constrain();
     let gpioa = dp.GPIOA.split(&mut rcc);
-    let pin: PA8<Alternate<AF6>> = gpioa.pa8.into_alternate();
+    let pin: PA8<AF6> = gpioa.pa8.into_alternate();
 
     let mut pwm = dp.TIM1.pwm(pin, 100.Hz(), &mut rcc);
 
diff --git a/examples/spi-dma.rs b/examples/spi-dma.rs
index 3404f2c0..318ab48f 100644
--- a/examples/spi-dma.rs
+++ b/examples/spi-dma.rs
@@ -6,11 +6,7 @@
 
 use crate::hal::{
     delay::DelayFromCountDownTimer,
-    gpio::gpioa::PA5,
-    gpio::gpioa::PA6,
-    gpio::gpioa::PA7,
-    gpio::Alternate,
-    gpio::AF5,
+    gpio::{AF5, PA5, PA6, PA7},
     prelude::*,
     pwr::PwrExt,
     rcc::Config,
@@ -44,9 +40,9 @@ fn main() -> ! {
     let mut delay_tim2 = DelayFromCountDownTimer::new(timer2.start_count_down(100.millis()));
 
     let gpioa = dp.GPIOA.split(&mut rcc);
-    let sclk: PA5<Alternate<AF5>> = gpioa.pa5.into_alternate();
-    let miso: PA6<Alternate<AF5>> = gpioa.pa6.into_alternate();
-    let mosi: PA7<Alternate<AF5>> = gpioa.pa7.into_alternate();
+    let sclk: PA5<AF5> = gpioa.pa5.into_alternate();
+    let miso: PA6<AF5> = gpioa.pa6.into_alternate();
+    let mosi: PA7<AF5> = gpioa.pa7.into_alternate();
 
     let spi = dp
         .SPI1
diff --git a/examples/spi-example.rs b/examples/spi-example.rs
index a661e248..33b86c2b 100644
--- a/examples/spi-example.rs
+++ b/examples/spi-example.rs
@@ -7,11 +7,7 @@
 
 use hal::{
     delay::DelayFromCountDownTimer,
-    gpio::gpioa::PA5,
-    gpio::gpioa::PA6,
-    gpio::gpioa::PA7,
-    gpio::Alternate,
-    gpio::AF5,
+    gpio::{AF5, PA5, PA6, PA7},
     hal_02::spi::FullDuplex,
     prelude::*,
     pwr::PwrExt,
@@ -41,9 +37,9 @@ fn main() -> ! {
     let mut delay_tim2 = DelayFromCountDownTimer::new(timer2.start_count_down(100.millis()));
 
     let gpioa = dp.GPIOA.split(&mut rcc);
-    let sclk: PA5<Alternate<AF5>> = gpioa.pa5.into_alternate();
-    let miso: PA6<Alternate<AF5>> = gpioa.pa6.into_alternate();
-    let mosi: PA7<Alternate<AF5>> = gpioa.pa7.into_alternate();
+    let sclk: PA5<AF5> = gpioa.pa5.into_alternate();
+    let miso: PA6<AF5> = gpioa.pa6.into_alternate();
+    let mosi: PA7<AF5> = gpioa.pa7.into_alternate();
 
     let mut spi = dp
         .SPI1
@@ -52,13 +48,13 @@ fn main() -> ! {
     cs.set_high().unwrap();
 
     // "Hello world!"
-    let message: [char; 12] = ['H', 'e', 'l', 'l', 'o', ' ', 'w', 'o', 'r', 'l', 'd', '!'];
+    let message = b"Hello world!";
     let mut received_byte: u8;
 
     loop {
-        for byte in message.iter() {
+        for &byte in message {
             cs.set_low().unwrap();
-            spi.send(*byte as u8).unwrap();
+            spi.send(byte).unwrap();
             received_byte = nb::block!(FullDuplex::read(&mut spi)).unwrap();
             cs.set_high().unwrap();
 
diff --git a/examples/spi-sd.rs b/examples/spi-sd.rs
index 7be0e077..6a98d877 100644
--- a/examples/spi-sd.rs
+++ b/examples/spi-sd.rs
@@ -6,11 +6,7 @@
 extern crate embedded_sdmmc;
 
 use fugit::RateExtU32;
-use hal::gpio::gpiob::PB14;
-use hal::gpio::gpiob::PB15;
-use hal::gpio::gpiof::PF9;
-use hal::gpio::Alternate;
-use hal::gpio::AF5;
+use hal::gpio::{AF5, PB14, PB15, PF9};
 use hal::prelude::*;
 use hal::pwr::PwrExt;
 use hal::rcc::Config;
@@ -43,9 +39,9 @@ fn main() -> ! {
         cs
     };
 
-    let sck: PF9<Alternate<AF5>> = gpiof.pf9.into_alternate();
-    let miso: PB14<Alternate<AF5>> = gpiob.pb14.into_alternate();
-    let mosi: PB15<Alternate<AF5>> = gpiob.pb15.into_alternate();
+    let sck: PF9<AF5> = gpiof.pf9.into_alternate();
+    let miso: PB14<AF5> = gpiob.pb14.into_alternate();
+    let mosi: PB15<AF5> = gpiob.pb15.into_alternate();
 
     let spi = dp
         .SPI2
diff --git a/src/can.rs b/src/can.rs
index dbfef79d..0dda3c68 100644
--- a/src/can.rs
+++ b/src/can.rs
@@ -53,11 +53,11 @@ macro_rules! pins {
          rx: [ $($( #[ $pmetarx:meta ] )* $rx:ident<$rxaf:ident>),+ $(,)? ])) => {
         $(
             $( #[ $pmetatx ] )*
-            impl sealed::Tx<$PER> for $tx<crate::gpio::Alternate<$txaf>> {}
+            impl sealed::Tx<$PER> for $tx<$txaf> {}
         )+
         $(
             $( #[ $pmetarx ] )*
-            impl sealed::Rx<$PER> for $rx<crate::gpio::Alternate<$rxaf>> {}
+            impl sealed::Rx<$PER> for $rx<$rxaf> {}
         )+
     };
 }
@@ -65,12 +65,7 @@ macro_rules! pins {
 mod fdcan1 {
     use super::sealed;
     use super::{Can, CanExt};
-    use crate::gpio::{
-        gpioa::{PA11, PA12},
-        gpiob::{PB8, PB9},
-        gpiod::{PD0, PD1},
-        AF9,
-    };
+    use crate::gpio::{AF9, PA11, PA12, PB8, PB9, PD0, PD1};
     use crate::stm32::FDCAN1;
     use fdcan;
 
@@ -119,10 +114,7 @@ mod fdcan1 {
 mod fdcan2 {
     use super::sealed;
     use super::{Can, CanExt};
-    use crate::gpio::{
-        gpiob::{PB12, PB13, PB5, PB6},
-        AF9,
-    };
+    use crate::gpio::{AF9, PB12, PB13, PB5, PB6};
     use crate::stm32::FDCAN2;
     use fdcan;
     use fdcan::message_ram;
@@ -166,11 +158,7 @@ mod fdcan2 {
 mod fdcan3 {
     use super::sealed;
     use super::{Can, CanExt};
-    use crate::gpio::{
-        gpioa::{PA15, PA8},
-        gpiob::{PB3, PB4},
-        AF11,
-    };
+    use crate::gpio::{AF11, PA15, PA8, PB3, PB4};
     use crate::stm32::FDCAN3;
     use fdcan;
     use fdcan::message_ram;
diff --git a/src/comparator.rs b/src/comparator.rs
index a9ebe9c7..2fb4772f 100644
--- a/src/comparator.rs
+++ b/src/comparator.rs
@@ -9,31 +9,8 @@ use core::marker::PhantomData;
 
 use crate::dac;
 use crate::exti::{Event as ExtiEvent, ExtiExt};
-use crate::gpio::{
-    gpioa::{PA0, PA1, PA11, PA12, PA2, PA3, PA4, PA5, PA6, PA7},
-    gpiob::{PB0, PB1, PB14, PB15, PB2, PB6, PB7, PB8, PB9},
-    gpioc::PC2,
-    gpiof::PF4,
-    Analog, OpenDrain, Output, PushPull, SignalEdge, AF2, AF3, AF8,
-};
+use crate::gpio::{self, Analog, OpenDrain, Output, PushPull, SignalEdge};
 
-#[cfg(any(
-    feature = "stm32g473",
-    feature = "stm32g483",
-    feature = "stm32g474",
-    feature = "stm32g484"
-))]
-use crate::gpio::{
-    gpioa::{PA10, PA8, PA9},
-    gpiob::{PB10, PB11, PB12, PB13},
-    gpioc::{PC6, PC7, PC8},
-    gpiod::{PD10, PD11, PD12, PD13, PD14, PD15},
-    AF7,
-};
-
-use crate::gpio::gpioc::{PC0, PC1};
-use crate::gpio::gpioe::{PE7, PE8};
-use crate::gpio::gpiof::PF1;
 use crate::rcc::{Clocks, Rcc};
 use crate::stasis;
 use crate::stm32::{COMP, EXTI};
@@ -161,13 +138,13 @@ pub trait NegativeInput<C> {
 
 macro_rules! positive_input_pin {
     ($COMP:ident, $pin_0:ident, $pin_1:ident) => {
-        impl PositiveInput<$COMP> for $pin_0<Analog> {
+        impl PositiveInput<$COMP> for gpio::$pin_0<Analog> {
             fn setup(_s: impl stasis::EntitlementLock<Resource = Self>, comp: &mut $COMP) {
                 comp.csr().modify(|_, w| w.inpsel().bit(false));
             }
         }
 
-        impl PositiveInput<$COMP> for $pin_1<Analog> {
+        impl PositiveInput<$COMP> for gpio::$pin_1<Analog> {
             fn setup(_s: impl stasis::EntitlementLock<Resource = Self>, comp: &mut $COMP) {
                 comp.csr().modify(|_, w| w.inpsel().bit(true));
             }
@@ -224,10 +201,10 @@ macro_rules! negative_input_pin {
 }
 
 negative_input_pin! {
-    COMP1: PA4<Analog>, PA0<Analog>,
-    COMP2: PA5<Analog>, PA2<Analog>,
-    COMP3: PF1<Analog>, PC0<Analog>,
-    COMP4: PE8<Analog>, PB2<Analog>,
+    COMP1: gpio::PA4<Analog>, gpio::PA0<Analog>,
+    COMP2: gpio::PA5<Analog>, gpio::PA2<Analog>,
+    COMP3: gpio::PF1<Analog>, gpio::PC0<Analog>,
+    COMP4: gpio::PE8<Analog>, gpio::PB2<Analog>,
 }
 
 #[cfg(any(
@@ -237,9 +214,9 @@ negative_input_pin! {
     feature = "stm32g484"
 ))]
 negative_input_pin! {
-    COMP5: PB10<Analog>, PD13<Analog>,
-    COMP6: PD10<Analog>, PB15<Analog>,
-    COMP7: PD15<Analog>, PB12<Analog>,
+    COMP5: gpio::PB10<Analog>, gpio::PD13<Analog>,
+    COMP6: gpio::PD10<Analog>, gpio::PB15<Analog>,
+    COMP7: gpio::PD15<Analog>, gpio::PB12<Analog>,
 }
 
 pub mod refint_input {
@@ -626,38 +603,38 @@ pub trait OutputPin<COMP> {
 
 #[allow(unused_macros)] // TODO: add support for more devices
 macro_rules! output_pin {
-    ($COMP:ident, $pin:ident, $AF:ident, $mode_t:ident, $into:ident) => {
-        impl OutputPin<$COMP> for $pin<Output<$mode_t>> {
+    ($COMP:ident, $pin:ident, $AF:literal, $mode_t:ident, $into:ident) => {
+        impl OutputPin<$COMP> for gpio::$pin<Output<$mode_t>> {
             fn setup(self) {
                 self.$into::<$AF>();
             }
         }
     };
-    ($($COMP:ident: $pin:ident, $AF:ident,)+) => {$(
+    ($($COMP:ident: $pin:ident, $AF:literal,)+) => {$(
         output_pin!($COMP, $pin, $AF, PushPull, into_alternate);
         output_pin!($COMP, $pin, $AF, OpenDrain, into_alternate_open_drain);
     )+};
 }
 
 output_pin! {
-    COMP1: PA0,  AF8,
-    COMP1: PA6,  AF8,
-    COMP1: PA11, AF8,
-    COMP1: PB8,  AF8,
-    COMP1: PF4,  AF2,
-
-    COMP2: PA2,  AF8,
-    COMP2: PA7,  AF8,
-    COMP2: PA12, AF8,
-    COMP2: PB9,  AF8,
-
-    COMP3: PB7,  AF8,
-    COMP3: PB15, AF3,
-    COMP3: PC2,  AF3,
-
-    COMP4: PB1,  AF8,
-    COMP4: PB6,  AF8,
-    COMP4: PB14, AF8,
+    COMP1: PA0,  8,
+    COMP1: PA6,  8,
+    COMP1: PA11, 8,
+    COMP1: PB8,  8,
+    COMP1: PF4,  2,
+
+    COMP2: PA2,  8,
+    COMP2: PA7,  8,
+    COMP2: PA12, 8,
+    COMP2: PB9,  8,
+
+    COMP3: PB7,  8,
+    COMP3: PB15, 3,
+    COMP3: PC2,  3,
+
+    COMP4: PB1,  8,
+    COMP4: PB6,  8,
+    COMP4: PB14, 8,
 }
 
 #[cfg(any(
@@ -667,12 +644,12 @@ output_pin! {
     feature = "stm32g484",
 ))]
 output_pin! {
-    COMP5: PA9,  AF8,
-    COMP5: PC7,  AF7,
+    COMP5: PA9,  8,
+    COMP5: PC7,  7,
 
-    COMP6: PA10, AF8,
-    COMP6: PC6,  AF7,
+    COMP6: PA10, 8,
+    COMP6: PC6,  7,
 
-    COMP7: PA8, AF8,
-    COMP7: PC8, AF7,
+    COMP7: PA8, 8,
+    COMP7: PC8, 7,
 }
diff --git a/src/dac.rs b/src/dac.rs
index 9827ccfb..78f6a483 100644
--- a/src/dac.rs
+++ b/src/dac.rs
@@ -9,8 +9,7 @@ use core::marker::PhantomData;
 use core::mem::MaybeUninit;
 use core::ops::Deref;
 
-use crate::gpio::gpioa::{PA4, PA5, PA6};
-use crate::gpio::DefaultMode;
+use crate::gpio::{DefaultMode, PA4, PA5, PA6};
 use crate::pac;
 use crate::rcc::{self, *};
 use crate::stm32::RCC;
diff --git a/src/gpio.rs b/src/gpio.rs
index b150b741..dddf0af1 100644
--- a/src/gpio.rs
+++ b/src/gpio.rs
@@ -22,6 +22,9 @@ pub struct Input<MODE> {
     _mode: PhantomData<MODE>,
 }
 
+/// Some alternate mode (type state)
+pub struct Alternate<const A: u8, Otype = PushPull>(PhantomData<Otype>);
+
 /// Floating input (type state)
 pub struct Floating;
 
@@ -60,26 +63,33 @@ pub enum SignalEdge {
     RisingFalling,
 }
 
-/// Altername Mode (type state)
-pub struct Alternate<const A: u8>;
-pub struct AlternateOD<const A: u8>;
-
-pub const AF0: u8 = 0;
-pub const AF1: u8 = 1;
-pub const AF2: u8 = 2;
-pub const AF3: u8 = 3;
-pub const AF4: u8 = 4;
-pub const AF5: u8 = 5;
-pub const AF6: u8 = 6;
-pub const AF7: u8 = 7;
-pub const AF8: u8 = 8;
-pub const AF9: u8 = 9;
-pub const AF10: u8 = 10;
-pub const AF11: u8 = 11;
-pub const AF12: u8 = 12;
-pub const AF13: u8 = 13;
-pub const AF14: u8 = 14;
-pub const AF15: u8 = 15;
+macro_rules! af {
+    ($($i:literal: $AFi:ident),+) => {
+        $(
+            #[doc = concat!("Alternate function ", $i, " (type state)" )]
+            pub type $AFi<Otype = PushPull> = Alternate<$i, Otype>;
+        )+
+    };
+}
+
+af!(
+    0: AF0,
+    1: AF1,
+    2: AF2,
+    3: AF3,
+    4: AF4,
+    5: AF5,
+    6: AF6,
+    7: AF7,
+    8: AF8,
+    9: AF9,
+    10: AF10,
+    11: AF11,
+    12: AF12,
+    13: AF13,
+    14: AF14,
+    15: AF15
+);
 
 /// External Interrupt Pin
 pub trait ExtiPin {
@@ -576,7 +586,7 @@ macro_rules! gpio {
                         $PXi { _mode: PhantomData }
                     }
 
-                    pub fn into_alternate_open_drain<const A: u8>(self) -> $PXi<AlternateOD<A>> {
+                    pub fn into_alternate_open_drain<const A: u8>(self) -> $PXi<Alternate<A, OpenDrain>> {
                         let mode = A as u8;
                         unsafe {
                             let gpio = &(*$GPIOX::ptr());
@@ -753,6 +763,8 @@ macro_rules! gpio {
                 }
             }
         }
+
+        pub use $gpiox::{ $($PXi,)+ };
     }
 }
 
diff --git a/src/i2c.rs b/src/i2c.rs
index 7132f211..9129679d 100644
--- a/src/i2c.rs
+++ b/src/i2c.rs
@@ -3,15 +3,7 @@ use crate::stm32::i2c1;
 use embedded_hal::i2c::{ErrorKind, Operation, SevenBitAddress, TenBitAddress};
 use embedded_hal_old::blocking::i2c::{Read, Write, WriteRead};
 
-use crate::gpio::{gpioa::*, gpiob::*, gpioc::*, gpiof::*};
-#[cfg(any(
-    feature = "stm32g473",
-    feature = "stm32g474",
-    feature = "stm32g483",
-    feature = "stm32g484"
-))]
-use crate::gpio::{gpiog::*, AF3};
-use crate::gpio::{AlternateOD, AF2, AF4, AF8};
+use crate::gpio::{self, OpenDrain};
 use crate::rcc::{Enable, GetBusFreq, Rcc, RccBus, Reset};
 #[cfg(any(
     feature = "stm32g473",
@@ -206,17 +198,17 @@ macro_rules! busy_wait {
 
 macro_rules! i2c {
     ($I2CX:ident, $i2cx:ident,
-        sda: [ $($( #[ $pmetasda:meta ] )* $PSDA:ty,)+ ],
-        scl: [ $($( #[ $pmetascl:meta ] )* $PSCL:ty,)+ ],
+        sda: [ $($( #[ $pmetasda:meta ] )* $PSDA:ident<$AFDA:ident>,)+ ],
+        scl: [ $($( #[ $pmetascl:meta ] )* $PSCL:ident<$AFCL:ident>,)+ ],
     ) => {
         $(
             $( #[ $pmetasda ] )*
-            impl SDAPin<$I2CX> for $PSDA {}
+            impl SDAPin<$I2CX> for gpio::$PSDA<gpio::$AFDA<OpenDrain>> {}
         )+
 
         $(
             $( #[ $pmetascl ] )*
-            impl SCLPin<$I2CX> for $PSCL {}
+            impl SCLPin<$I2CX> for gpio::$PSCL<gpio::$AFCL<OpenDrain>> {}
         )+
 
         impl I2cExt<$I2CX> for $I2CX {
@@ -463,14 +455,14 @@ i2c!(
     I2C1,
     i2c1,
     sda: [
-        PA14<AlternateOD<AF4>>,
-        PB7<AlternateOD<AF4>>,
-        PB9<AlternateOD<AF4>>,
+        PA14<AF4>,
+        PB7<AF4>,
+        PB9<AF4>,
     ],
     scl: [
-        PA13<AlternateOD<AF4>>,
-        PA15<AlternateOD<AF4>>,
-        PB8<AlternateOD<AF4>>,
+        PA13<AF4>,
+        PA15<AF4>,
+        PB8<AF4>,
     ],
 );
 
@@ -478,19 +470,19 @@ i2c!(
     I2C2,
     i2c2,
     sda: [
-        PA8<AlternateOD<AF4>>,
-        PF0<AlternateOD<AF4>>,
+        PA8<AF4>,
+        PF0<AF4>,
     ],
     scl: [
-        PA9<AlternateOD<AF4>>,
-        PC4<AlternateOD<AF4>>,
+        PA9<AF4>,
+        PC4<AF4>,
         #[cfg(any(
             feature = "stm32g473",
             feature = "stm32g474",
             feature = "stm32g483",
             feature = "stm32g484"
         ))]
-        PF6<AlternateOD<AF4>>,
+        PF6<AF4>,
     ],
 );
 
@@ -498,41 +490,41 @@ i2c!(
     I2C3,
     i2c3,
     sda: [
-        PB5<AlternateOD<AF8>>,
-        PC11<AlternateOD<AF8>>,
-        PC9<AlternateOD<AF8>>,
+        PB5<AF8>,
+        PC11<AF8>,
+        PC9<AF8>,
         #[cfg(any(
             feature = "stm32g473",
             feature = "stm32g474",
             feature = "stm32g483",
             feature = "stm32g484"
         ))]
-        PF4<AlternateOD<AF4>>,
+        PF4<AF4>,
         #[cfg(any(
             feature = "stm32g473",
             feature = "stm32g474",
             feature = "stm32g483",
             feature = "stm32g484"
         ))]
-        PG8<AlternateOD<AF4>>,
+        PG8<AF4>,
     ],
     scl: [
-        PA8<AlternateOD<AF2>>,
-        PC8<AlternateOD<AF8>>,
+        PA8<AF2>,
+        PC8<AF8>,
         #[cfg(any(
             feature = "stm32g473",
             feature = "stm32g474",
             feature = "stm32g483",
             feature = "stm32g484"
         ))]
-        PF3<AlternateOD<AF4>>,
+        PF3<AF4>,
         #[cfg(any(
             feature = "stm32g473",
             feature = "stm32g474",
             feature = "stm32g483",
             feature = "stm32g484"
         ))]
-        PG7<AlternateOD<AF4>>,
+        PG7<AF4>,
     ],
 );
 
@@ -546,15 +538,15 @@ i2c!(
     I2C4,
     i2c4,
     sda: [
-        PB7<AlternateOD<AF3>>,
-        PC7<AlternateOD<AF8>>,
-        PF15<AlternateOD<AF4>>,
-        PG4<AlternateOD<AF4>>,
+        PB7<AF3>,
+        PC7<AF8>,
+        PF15<AF4>,
+        PG4<AF4>,
     ],
     scl: [
-        PA13<AlternateOD<AF3>>,
-        PC6<AlternateOD<AF8>>,
-        PF14<AlternateOD<AF4>>,
-        PG3<AlternateOD<AF4>>,
+        PA13<AF3>,
+        PC6<AF8>,
+        PF14<AF4>,
+        PG3<AF4>,
     ],
 );
diff --git a/src/opamp.rs b/src/opamp.rs
index 5679c161..a385b67a 100644
--- a/src/opamp.rs
+++ b/src/opamp.rs
@@ -61,6 +61,7 @@
 
 use core::marker::PhantomData;
 
+use crate::gpio::{self, Analog};
 use crate::stasis;
 
 /// PGA Gain
@@ -762,108 +763,108 @@ macro_rules! opamps {
 #[cfg(any(feature = "stm32g431", feature = "stm32g441"))]
 opamps! {
     Opamp1 => opamp1: {
-        vinm0: crate::gpio::gpioa::PA3<crate::gpio::Analog>,
-        vinm1: crate::gpio::gpioc::PC5<crate::gpio::Analog>,
+        vinm0: gpio::PA3<Analog>,
+        vinm1: gpio::PC5<Analog>,
         inverting: {
-            crate::gpio::gpioa::PA3<crate::gpio::Analog>: Vinm0,
-            crate::gpio::gpioc::PC5<crate::gpio::Analog>: Vinm1,
+            gpio::PA3<Analog>: Vinm0,
+            gpio::PC5<Analog>: Vinm1,
         },
         non_inverting: {
-            crate::gpio::gpioa::PA1<crate::gpio::Analog>: Vinp0,
-            crate::gpio::gpioa::PA3<crate::gpio::Analog>: Vinp1,
-            crate::gpio::gpioa::PA7<crate::gpio::Analog>: Vinp2,
+            gpio::PA1<Analog>: Vinp0,
+            gpio::PA3<Analog>: Vinp1,
+            gpio::PA7<Analog>: Vinp2,
         },
-        output: crate::gpio::gpioa::PA2<crate::gpio::Analog>,
+        output: gpio::PA2<Analog>,
     },
     Opamp2 => opamp2: {
-        vinm0: crate::gpio::gpioa::PA5<crate::gpio::Analog>,
-        vinm1: crate::gpio::gpioc::PC5<crate::gpio::Analog>,
+        vinm0: gpio::PA5<Analog>,
+        vinm1: gpio::PC5<Analog>,
         inverting: {
-            crate::gpio::gpioa::PA5<crate::gpio::Analog>: Vinm0,
-            crate::gpio::gpioc::PC5<crate::gpio::Analog>: Vinm1,
+            gpio::PA5<Analog>: Vinm0,
+            gpio::PC5<Analog>: Vinm1,
         },
         non_inverting: {
-            crate::gpio::gpioa::PA7<crate::gpio::Analog>: Vinp0,
-            crate::gpio::gpiob::PB14<crate::gpio::Analog>: Vinp1,
-            crate::gpio::gpiob::PB0<crate::gpio::Analog>: Vinp2,
-            crate::gpio::gpiod::PD14<crate::gpio::Analog>: Vinp3,
+            gpio::PA7<Analog>: Vinp0,
+            gpio::PB14<Analog>: Vinp1,
+            gpio::PB0<Analog>: Vinp2,
+            gpio::PD14<Analog>: Vinp3,
         },
-        output: crate::gpio::gpioa::PA6<crate::gpio::Analog>,
+        output: gpio::PA6<Analog>,
     },
     Opamp3 => opamp3: {
-        vinm0: crate::gpio::gpiob::PB2<crate::gpio::Analog>,
-        vinm1: crate::gpio::gpiob::PB10<crate::gpio::Analog>,
+        vinm0: gpio::PB2<Analog>,
+        vinm1: gpio::PB10<Analog>,
         inverting: {
-            crate::gpio::gpiob::PB2<crate::gpio::Analog>: Vinm0,
-            crate::gpio::gpiob::PB10<crate::gpio::Analog>: Vinm1,
+            gpio::PB2<Analog>: Vinm0,
+            gpio::PB10<Analog>: Vinm1,
         },
         non_inverting: {
-            crate::gpio::gpiob::PB0<crate::gpio::Analog>: Vinp0,
-            crate::gpio::gpiob::PB13<crate::gpio::Analog>: Vinp1,
-            crate::gpio::gpioa::PA1<crate::gpio::Analog>: Vinp2,
+            gpio::PB0<Analog>: Vinp0,
+            gpio::PB13<Analog>: Vinp1,
+            gpio::PA1<Analog>: Vinp2,
         },
-        output: crate::gpio::gpiob::PB1<crate::gpio::Analog>,
+        output: gpio::PB1<Analog>,
     },
 }
 
 #[cfg(any(feature = "stm32g491", feature = "stm32g4a1"))]
 opamps! {
     Opamp1 => opamp1: {
-        vinm0: crate::gpio::gpioa::PA3<crate::gpio::Analog>,
-        vinm1: crate::gpio::gpioc::PC5<crate::gpio::Analog>,
+        vinm0: gpio::PA3<Analog>,
+        vinm1: gpio::PC5<Analog>,
         inverting: {
-            crate::gpio::gpioa::PA3<crate::gpio::Analog>: Vinm0,
-            crate::gpio::gpioc::PC5<crate::gpio::Analog>: Vinm1,
+            gpio::PA3<Analog>: Vinm0,
+            gpio::PC5<Analog>: Vinm1,
         },
         non_inverting: {
-            crate::gpio::gpioa::PA1<crate::gpio::Analog>: Vinp0,
-            crate::gpio::gpioa::PA3<crate::gpio::Analog>: Vinp1,
-            crate::gpio::gpioa::PA7<crate::gpio::Analog>: Vinp2,
+            gpio::PA1<Analog>: Vinp0,
+            gpio::PA3<Analog>: Vinp1,
+            gpio::PA7<Analog>: Vinp2,
         },
-        output: crate::gpio::gpioa::PA2<crate::gpio::Analog>,
+        output: gpio::PA2<Analog>,
     },
     Opamp2 => opamp2: {
-        vinm0: crate::gpio::gpioa::PA5<crate::gpio::Analog>,
-        vinm1: crate::gpio::gpioc::PC5<crate::gpio::Analog>,
+        vinm0: gpio::PA5<Analog>,
+        vinm1: gpio::PC5<Analog>,
         inverting: {
-            crate::gpio::gpioa::PA5<crate::gpio::Analog>: Vinm0,
-            crate::gpio::gpioc::PC5<crate::gpio::Analog>: Vinm1,
+            gpio::PA5<Analog>: Vinm0,
+            gpio::PC5<Analog>: Vinm1,
         },
         non_inverting: {
-            crate::gpio::gpioa::PA7<crate::gpio::Analog>: Vinp0,
-            crate::gpio::gpiob::PB14<crate::gpio::Analog>: Vinp1,
-            crate::gpio::gpiob::PB0<crate::gpio::Analog>: Vinp2,
-            crate::gpio::gpiod::PD14<crate::gpio::Analog>: Vinp3,
+            gpio::PA7<Analog>: Vinp0,
+            gpio::PB14<Analog>: Vinp1,
+            gpio::PB0<Analog>: Vinp2,
+            gpio::PD14<Analog>: Vinp3,
         },
-        output: crate::gpio::gpioa::PA6<crate::gpio::Analog>,
+        output: gpio::PA6<Analog>,
     },
     Opamp3 => opamp3: {
-        vinm0: crate::gpio::gpiob::PB2<crate::gpio::Analog>,
-        vinm1: crate::gpio::gpiob::PB10<crate::gpio::Analog>,
+        vinm0: gpio::PB2<Analog>,
+        vinm1: gpio::PB10<Analog>,
         inverting: {
-            crate::gpio::gpiob::PB2<crate::gpio::Analog>: Vinm0,
-            crate::gpio::gpiob::PB10<crate::gpio::Analog>: Vinm1,
+            gpio::PB2<Analog>: Vinm0,
+            gpio::PB10<Analog>: Vinm1,
         },
         non_inverting: {
-            crate::gpio::gpiob::PB0<crate::gpio::Analog>: Vinp0,
-            crate::gpio::gpiob::PB13<crate::gpio::Analog>: Vinp1,
-            crate::gpio::gpioa::PA1<crate::gpio::Analog>: Vinp2,
+            gpio::PB0<Analog>: Vinp0,
+            gpio::PB13<Analog>: Vinp1,
+            gpio::PA1<Analog>: Vinp2,
         },
-        output: crate::gpio::gpiob::PB1<crate::gpio::Analog>,
+        output: gpio::PB1<Analog>,
     },
     Opamp6 => opamp6: {
-        vinm0: crate::gpio::gpioa::PA1<crate::gpio::Analog>,
-        vinm1: crate::gpio::gpiob::PB1<crate::gpio::Analog>,
+        vinm0: gpio::PA1<Analog>,
+        vinm1: gpio::PB1<Analog>,
         inverting: {
-            crate::gpio::gpioa::PA1<crate::gpio::Analog>: Vinm0,
-            crate::gpio::gpiob::PB1<crate::gpio::Analog>: Vinm1,
+            gpio::PA1<Analog>: Vinm0,
+            gpio::PB1<Analog>: Vinm1,
         },
         non_inverting: {
-            crate::gpio::gpiob::PB12<crate::gpio::Analog>: Vinp0,
-            crate::gpio::gpiod::PD9<crate::gpio::Analog>: Vinp1,
-            crate::gpio::gpiob::PB13<crate::gpio::Analog>: Vinp2,
+            gpio::PB12<Analog>: Vinp0,
+            gpio::PD9<Analog>: Vinp1,
+            gpio::PB13<Analog>: Vinp2,
         },
-        output: crate::gpio::gpiob::PB11<crate::gpio::Analog>,
+        output: gpio::PB11<Analog>,
     },
 }
 
@@ -875,88 +876,88 @@ opamps! {
 ))]
 opamps! {
     Opamp1 => opamp1: {
-        vinm0: crate::gpio::gpioa::PA3<crate::gpio::Analog>,
-        vinm1: crate::gpio::gpioc::PC5<crate::gpio::Analog>,
+        vinm0: gpio::PA3<Analog>,
+        vinm1: gpio::PC5<Analog>,
         inverting: {
-            crate::gpio::gpioa::PA3<crate::gpio::Analog>: Vinm0,
-            crate::gpio::gpioc::PC5<crate::gpio::Analog>: Vinm1,
+            gpio::PA3<Analog>: Vinm0,
+            gpio::PC5<Analog>: Vinm1,
         },
         non_inverting: {
-            crate::gpio::gpioa::PA1<crate::gpio::Analog>: Vinp0,
-            crate::gpio::gpioa::PA3<crate::gpio::Analog>: Vinp1,
-            crate::gpio::gpioa::PA7<crate::gpio::Analog>: Vinp2,
+            gpio::PA1<Analog>: Vinp0,
+            gpio::PA3<Analog>: Vinp1,
+            gpio::PA7<Analog>: Vinp2,
         },
-        output: crate::gpio::gpioa::PA2<crate::gpio::Analog>,
+        output: gpio::PA2<Analog>,
     },
     Opamp2 => opamp2: {
-        vinm0: crate::gpio::gpioa::PA5<crate::gpio::Analog>,
-        vinm1: crate::gpio::gpioc::PC5<crate::gpio::Analog>,
+        vinm0: gpio::PA5<Analog>,
+        vinm1: gpio::PC5<Analog>,
         inverting: {
-            crate::gpio::gpioa::PA5<crate::gpio::Analog>: Vinm0,
-            crate::gpio::gpioc::PC5<crate::gpio::Analog>: Vinm1,
+            gpio::PA5<Analog>: Vinm0,
+            gpio::PC5<Analog>: Vinm1,
         },
         non_inverting: {
-            crate::gpio::gpioa::PA7<crate::gpio::Analog>: Vinp0,
-            crate::gpio::gpiob::PB14<crate::gpio::Analog>: Vinp1,
-            crate::gpio::gpiob::PB0<crate::gpio::Analog>: Vinp2,
-            crate::gpio::gpiod::PD14<crate::gpio::Analog>: Vinp3,
+            gpio::PA7<Analog>: Vinp0,
+            gpio::PB14<Analog>: Vinp1,
+            gpio::PB0<Analog>: Vinp2,
+            gpio::PD14<Analog>: Vinp3,
         },
-        output: crate::gpio::gpioa::PA6<crate::gpio::Analog>,
+        output: gpio::PA6<Analog>,
     },
     Opamp3 => opamp3: {
-        vinm0: crate::gpio::gpiob::PB2<crate::gpio::Analog>,
-        vinm1: crate::gpio::gpiob::PB10<crate::gpio::Analog>,
+        vinm0: gpio::PB2<Analog>,
+        vinm1: gpio::PB10<Analog>,
         inverting: {
-            crate::gpio::gpiob::PB2<crate::gpio::Analog>: Vinm0,
-            crate::gpio::gpiob::PB10<crate::gpio::Analog>: Vinm1,
+            gpio::PB2<Analog>: Vinm0,
+            gpio::PB10<Analog>: Vinm1,
         },
         non_inverting: {
-            crate::gpio::gpiob::PB0<crate::gpio::Analog>: Vinp0,
-            crate::gpio::gpiob::PB13<crate::gpio::Analog>: Vinp1,
-            crate::gpio::gpioa::PA1<crate::gpio::Analog>: Vinp2,
+            gpio::PB0<Analog>: Vinp0,
+            gpio::PB13<Analog>: Vinp1,
+            gpio::PA1<Analog>: Vinp2,
         },
-        output: crate::gpio::gpiob::PB1<crate::gpio::Analog>,
+        output: gpio::PB1<Analog>,
     },
     Opamp4 => opamp4: {
-        vinm0: crate::gpio::gpiob::PB10<crate::gpio::Analog>,
-        vinm1: crate::gpio::gpiod::PD8<crate::gpio::Analog>,
+        vinm0: gpio::PB10<Analog>,
+        vinm1: gpio::PD8<Analog>,
         inverting: {
-            crate::gpio::gpiob::PB10<crate::gpio::Analog>: Vinm0,
-            crate::gpio::gpiod::PD8<crate::gpio::Analog>: Vinm1,
+            gpio::PB10<Analog>: Vinm0,
+            gpio::PD8<Analog>: Vinm1,
         },
         non_inverting: {
-            crate::gpio::gpiob::PB13<crate::gpio::Analog>: Vinp0,
-            crate::gpio::gpiod::PD11<crate::gpio::Analog>: Vinp1,
-            crate::gpio::gpiob::PB11<crate::gpio::Analog>: Vinp2,
+            gpio::PB13<Analog>: Vinp0,
+            gpio::PD11<Analog>: Vinp1,
+            gpio::PB11<Analog>: Vinp2,
         },
-        output: crate::gpio::gpiob::PB12<crate::gpio::Analog>,
+        output: gpio::PB12<Analog>,
     },
     Opamp5 => opamp5: {
-        vinm0: crate::gpio::gpiob::PB15<crate::gpio::Analog>,
-        vinm1: crate::gpio::gpioa::PA3<crate::gpio::Analog>,
+        vinm0: gpio::PB15<Analog>,
+        vinm1: gpio::PA3<Analog>,
         inverting: {
-            crate::gpio::gpiob::PB15<crate::gpio::Analog>: Vinm0,
-            crate::gpio::gpioa::PA3<crate::gpio::Analog>: Vinm1,
+            gpio::PB15<Analog>: Vinm0,
+            gpio::PA3<Analog>: Vinm1,
         },
         non_inverting: {
-            crate::gpio::gpiob::PB14<crate::gpio::Analog>: Vinp0,
-            crate::gpio::gpiod::PD12<crate::gpio::Analog>: Vinp1,
-            crate::gpio::gpioc::PC3<crate::gpio::Analog>: Vinp2,
+            gpio::PB14<Analog>: Vinp0,
+            gpio::PD12<Analog>: Vinp1,
+            gpio::PC3<Analog>: Vinp2,
         },
-        output: crate::gpio::gpioa::PA8<crate::gpio::Analog>,
+        output: gpio::PA8<Analog>,
     },
     Opamp6 => opamp6: {
-        vinm0: crate::gpio::gpioa::PA1<crate::gpio::Analog>,
-        vinm1: crate::gpio::gpiob::PB1<crate::gpio::Analog>,
+        vinm0: gpio::PA1<Analog>,
+        vinm1: gpio::PB1<Analog>,
         inverting: {
-            crate::gpio::gpioa::PA1<crate::gpio::Analog>: Vinm0,
-            crate::gpio::gpiob::PB1<crate::gpio::Analog>: Vinm1,
+            gpio::PA1<Analog>: Vinm0,
+            gpio::PB1<Analog>: Vinm1,
         },
         non_inverting: {
-            crate::gpio::gpiob::PB12<crate::gpio::Analog>: Vinp0,
-            crate::gpio::gpiod::PD9<crate::gpio::Analog>: Vinp1,
-            crate::gpio::gpiob::PB13<crate::gpio::Analog>: Vinp2,
+            gpio::PB12<Analog>: Vinp0,
+            gpio::PD9<Analog>: Vinp1,
+            gpio::PB13<Analog>: Vinp2,
         },
-        output: crate::gpio::gpiob::PB11<crate::gpio::Analog>,
+        output: gpio::PB11<Analog>,
     },
 }
diff --git a/src/pwm.rs b/src/pwm.rs
index b52d9598..a69c2746 100644
--- a/src/pwm.rs
+++ b/src/pwm.rs
@@ -195,13 +195,6 @@ use crate::stm32::{TIM1, TIM15, TIM16, TIM17, TIM2, TIM3, TIM4, TIM8};
 use crate::rcc::{Enable, GetBusFreq, Rcc, Reset};
 use crate::time::{ExtU32, Hertz, NanoSecond, RateExtU32};
 
-#[cfg(any(
-    feature = "stm32g473",
-    feature = "stm32g474",
-    feature = "stm32g483",
-    feature = "stm32g484"
-))]
-use crate::gpio::gpiog::*;
 #[cfg(any(
     feature = "stm32g473",
     feature = "stm32g474",
@@ -209,15 +202,14 @@ use crate::gpio::gpiog::*;
     feature = "stm32g484"
 ))]
 use crate::gpio::AF14;
-use crate::gpio::{gpioa::*, gpiob::*, gpioc::*, gpiod::*, gpioe::*, gpiof::*};
-use crate::gpio::{Alternate, AF1, AF10, AF11, AF12, AF2, AF3, AF4, AF5, AF6, AF9};
+use crate::gpio::{self, AF1, AF10, AF11, AF12, AF2, AF3, AF4, AF5, AF6, AF9};
 
 use core::mem::size_of;
 
 // This trait marks that a GPIO pin can be used with a specific timer channel
 // TIM is the timer being used
 // CHANNEL is a marker struct for the channel (or multi channels for tuples)
-// Example: impl Pins<TIM1, C1> for PA8<Alternate<AF1>> { type Channel = Pwm<TIM1, C1>; }
+// Example: impl Pins<TIM1, C1> for PA8<AF1> { type Channel = Pwm<TIM1, C1>; }
 /// Pins is a trait that marks which GPIO pins may be used as PWM channels; it should not be directly used.
 /// See the device datasheet 'Pin descriptions' chapter for which pins can be used with which timer PWM channels (or look at Implementors)
 pub trait Pins<TIM, CHANNEL, COMP> {
@@ -548,74 +540,74 @@ macro_rules! pins {
 pins! {
     LPTIMER1:
         OUT: [
-            PA14<Alternate<AF1>>,
-            PB2<Alternate<AF1>>,
-            PC1<Alternate<AF1>>
+            gpio::PA14<AF1>,
+            gpio::PB2<AF1>,
+            gpio::PC1<AF1>
         ]
 }
 // Dual channel timers
 pins! {
     TIM15:
         CH1(ComplementaryDisabled): [
-            PA2<Alternate<AF9>>,
-            PB14<Alternate<AF1>>,
-            PF9<Alternate<AF3>>
+            gpio::PA2<AF9>,
+            gpio::PB14<AF1>,
+            gpio::PF9<AF3>
         ]
         CH2(ComplementaryImpossible): [
-            PA3<Alternate<AF9>>,
-            PB15<Alternate<AF1>>,
-            PF10<Alternate<AF3>>
+            gpio::PA3<AF9>,
+            gpio::PB15<AF1>,
+            gpio::PF10<AF3>
         ]
         CH1N: [
-            PA1<Alternate<AF9>>,
-            PB15<Alternate<AF2>>,
+            gpio::PA1<AF9>,
+            gpio::PB15<AF2>,
             #[cfg(any(
                 feature = "stm32g473",
                 feature = "stm32g474",
                 feature = "stm32g483",
                 feature = "stm32g484"
             ))]
-            PG9<Alternate<AF14>>
+            gpio::PG9<AF14>
         ]
         CH2N: []
         BRK: [
-            PA9<Alternate<AF9>>,
-            PC5<Alternate<AF2>>
+            gpio::PA9<AF9>,
+            gpio::PC5<AF2>
         ]
         BRK2: []
     TIM16:
         CH1(ComplementaryDisabled): [
-            PA6<Alternate<AF1>>,
-            PA12<Alternate<AF1>>,
-            PB4<Alternate<AF1>>,
-            PB8<Alternate<AF1>>,
-            PE0<Alternate<AF4>>
+            gpio::PA6<AF1>,
+            gpio::PA12<AF1>,
+            gpio::PB4<AF1>,
+            gpio::PB8<AF1>,
+            gpio::PE0<AF4>
         ]
         CH2(ComplementaryImpossible): []
         CH1N: [
-            PA13<Alternate<AF1>>,
-            PB6<Alternate<AF1>>
+            gpio::PA13<AF1>,
+            gpio::PB6<AF1>
         ]
         CH2N: []
         BRK: [
-            PB5<Alternate<AF1>>
+            gpio::PB5<AF1>
         ]
         BRK2: []
     TIM17:
         CH1(ComplementaryDisabled): [
-            PA7<Alternate<AF1>>,
-            PB5<Alternate<AF10>>,
-            PB9<Alternate<AF1>>,
-            PE1<Alternate<AF4>>
+            gpio::PA7<AF1>,
+            gpio::PB5<AF10>,
+            gpio::PB9<AF1>,
+            gpio::PE1<AF4>
         ]
         CH2(ComplementaryImpossible): []
         CH1N: [
-            PB7<Alternate<AF1>>
+            gpio::PB7<AF1>
         ]
         CH2N: []
         BRK: [
-            PA10<Alternate<AF1>>,
-            PB4<Alternate<AF10>>
+            gpio::PA10<AF1>,
+            gpio::PB4<AF10>
         ]
         BRK2: []
 }
@@ -623,87 +615,87 @@ pins! {
 pins! {
     TIM1:
         CH1(ComplementaryDisabled): [
-            PA8<Alternate<AF6>>,
-            PC0<Alternate<AF2>>,
-            PE9<Alternate<AF2>>
+            gpio::PA8<AF6>,
+            gpio::PC0<AF2>,
+            gpio::PE9<AF2>
         ]
         CH2(ComplementaryDisabled): [
-            PA9<Alternate<AF6>>,
-            PC1<Alternate<AF2>>,
-            PE11<Alternate<AF2>>
+            gpio::PA9<AF6>,
+            gpio::PC1<AF2>,
+            gpio::PE11<AF2>
         ]
         CH3(ComplementaryDisabled): [
-            PA10<Alternate<AF6>>,
-            PC2<Alternate<AF2>>,
-            PE13<Alternate<AF2>>
+            gpio::PA10<AF6>,
+            gpio::PC2<AF2>,
+            gpio::PE13<AF2>
         ]
         CH4(ComplementaryDisabled): [
-            PA11<Alternate<AF11>>,
-            PC3<Alternate<AF2>>,
-            PE14<Alternate<AF2>>
+            gpio::PA11<AF11>,
+            gpio::PC3<AF2>,
+            gpio::PE14<AF2>
         ]
         CH1N: [
-            PA7<Alternate<AF6>>,
-            PA11<Alternate<AF6>>,
-            PB13<Alternate<AF6>>,
-            PC13<Alternate<AF4>>,
-            PE8<Alternate<AF2>>
+            gpio::PA7<AF6>,
+            gpio::PA11<AF6>,
+            gpio::PB13<AF6>,
+            gpio::PC13<AF4>,
+            gpio::PE8<AF2>
         ]
         CH2N: [
-            PA12<Alternate<AF6>>,
-            PB0<Alternate<AF6>>,
-            PB14<Alternate<AF6>>,
-            PE10<Alternate<AF2>>
+            gpio::PA12<AF6>,
+            gpio::PB0<AF6>,
+            gpio::PB14<AF6>,
+            gpio::PE10<AF2>
         ]
         CH3N: [
-            PB1<Alternate<AF6>>,
-            PB9<Alternate<AF12>>,
-            PB15<Alternate<AF4>>,
-            PE12<Alternate<AF2>>,
-            PF0<Alternate<AF6>>
+            gpio::PB1<AF6>,
+            gpio::PB9<AF12>,
+            gpio::PB15<AF4>,
+            gpio::PE12<AF2>,
+            gpio::PF0<AF6>
         ]
         CH4N: [
-            PC5<Alternate<AF6>>,
-            PE15<Alternate<AF6>>
+            gpio::PC5<AF6>,
+            gpio::PE15<AF6>
         ]
         BRK: [
-            PA6<Alternate<AF6>>,
-            PA14<Alternate<AF6>>,
-            PA15<Alternate<AF9>>,
-            PB8<Alternate<AF12>>,
-            PB10<Alternate<AF12>>,
-            PB12<Alternate<AF6>>,
-            PC13<Alternate<AF2>>,
-            PE15<Alternate<AF2>>
+            gpio::PA6<AF6>,
+            gpio::PA14<AF6>,
+            gpio::PA15<AF9>,
+            gpio::PB8<AF12>,
+            gpio::PB10<AF12>,
+            gpio::PB12<AF6>,
+            gpio::PC13<AF2>,
+            gpio::PE15<AF2>
         ]
         BRK2: [
-            PA11<Alternate<AF12>>,
-            PC3<Alternate<AF6>>,
-            PE14<Alternate<AF6>>
+            gpio::PA11<AF12>,
+            gpio::PC3<AF6>,
+            gpio::PE14<AF6>
         ]
     TIM2:
         CH1(ComplementaryImpossible): [
-            PA0<Alternate<AF1>>,
-            PA5<Alternate<AF1>>,
-            PA15<Alternate<AF1>>,
-            PD3<Alternate<AF2>>
+            gpio::PA0<AF1>,
+            gpio::PA5<AF1>,
+            gpio::PA15<AF1>,
+            gpio::PD3<AF2>
         ]
         CH2(ComplementaryImpossible): [
-            PA1<Alternate<AF1>>,
-            PB3<Alternate<AF1>>,
-            PD4<Alternate<AF2>>
+            gpio::PA1<AF1>,
+            gpio::PB3<AF1>,
+            gpio::PD4<AF2>
         ]
         CH3(ComplementaryImpossible): [
-            PA2<Alternate<AF1>>,
-            PA9<Alternate<AF10>>,
-            PB10<Alternate<AF1>>,
-            PD7<Alternate<AF2>>
+            gpio::PA2<AF1>,
+            gpio::PA9<AF10>,
+            gpio::PB10<AF1>,
+            gpio::PD7<AF2>
         ]
         CH4(ComplementaryImpossible): [
-            PA3<Alternate<AF1>>,
-            PA10<Alternate<AF10>>,
-            PB11<Alternate<AF1>>,
-            PD6<Alternate<AF2>>
+            gpio::PA3<AF1>,
+            gpio::PA10<AF10>,
+            gpio::PB11<AF1>,
+            gpio::PD6<AF2>
         ]
         CH1N: []
         CH2N: []
@@ -713,28 +705,28 @@ pins! {
         BRK2: []
     TIM3:
         CH1(ComplementaryImpossible): [
-            PA6<Alternate<AF2>>,
-            PB4<Alternate<AF2>>,
-            PC6<Alternate<AF2>>,
-            PE2<Alternate<AF2>>
+            gpio::PA6<AF2>,
+            gpio::PB4<AF2>,
+            gpio::PC6<AF2>,
+            gpio::PE2<AF2>
         ]
         CH2(ComplementaryImpossible): [
-            PA4<Alternate<AF2>>,
-            PA7<Alternate<AF2>>,
-            PB5<Alternate<AF2>>,
-            PC7<Alternate<AF2>>,
-            PE3<Alternate<AF2>>
+            gpio::PA4<AF2>,
+            gpio::PA7<AF2>,
+            gpio::PB5<AF2>,
+            gpio::PC7<AF2>,
+            gpio::PE3<AF2>
         ]
         CH3(ComplementaryImpossible): [
-            PB0<Alternate<AF2>>,
-            PC8<Alternate<AF2>>,
-            PE4<Alternate<AF2>>
+            gpio::PB0<AF2>,
+            gpio::PC8<AF2>,
+            gpio::PE4<AF2>
         ]
         CH4(ComplementaryImpossible): [
-            PB1<Alternate<AF2>>,
-            PB7<Alternate<AF10>>,
-            PC9<Alternate<AF2>>,
-            PE5<Alternate<AF2>>
+            gpio::PB1<AF2>,
+            gpio::PB7<AF10>,
+            gpio::PC9<AF2>,
+            gpio::PE5<AF2>
         ]
         CH1N: []
         CH2N: []
@@ -744,30 +736,30 @@ pins! {
         BRK2: []
     TIM4:
         CH1(ComplementaryImpossible): [
-            PA11<Alternate<AF10>>,
-            PB6<Alternate<AF2>>,
-            PD12<Alternate<AF2>>
+            gpio::PA11<AF10>,
+            gpio::PB6<AF2>,
+            gpio::PD12<AF2>
         ]
         CH2(ComplementaryImpossible): [
-            PA12<Alternate<AF10>>,
-            PB7<Alternate<AF2>>,
-            PD13<Alternate<AF2>>
+            gpio::PA12<AF10>,
+            gpio::PB7<AF2>,
+            gpio::PD13<AF2>
         ]
         CH3(ComplementaryImpossible): [
-            PA13<Alternate<AF10>>,
-            PB8<Alternate<AF2>>,
-            PD14<Alternate<AF2>>
+            gpio::PA13<AF10>,
+            gpio::PB8<AF2>,
+            gpio::PD14<AF2>
         ]
         CH4(ComplementaryImpossible): [
-            PB9<Alternate<AF2>>,
-            PD15<Alternate<AF2>>,
+            gpio::PB9<AF2>,
+            gpio::PD15<AF2>,
             #[cfg(any(
                 feature = "stm32g473",
                 feature = "stm32g474",
                 feature = "stm32g483",
                 feature = "stm32g484"
             ))]
-            PF6<Alternate<AF2>>
+            gpio::PF6<AF2>
         ]
         CH1N: []
         CH2N: []
@@ -785,24 +777,24 @@ pins! {
 pins! {
     TIM5:
         CH1(ComplementaryImpossible): [
-            PA0<Alternate<AF2>>,
-            PB2<Alternate<AF2>>,
-            PF6<Alternate<AF6>>
+            gpio::PA0<AF2>,
+            gpio::PB2<AF2>,
+            gpio::PF6<AF6>
         ]
         CH2(ComplementaryImpossible): [
-            PA1<Alternate<AF2>>,
-            PC12<Alternate<AF1>>,
-            PF7<Alternate<AF6>>
+            gpio::PA1<AF2>,
+            gpio::PC12<AF1>,
+            gpio::PF7<AF6>
         ]
         CH3(ComplementaryImpossible): [
-            PA2<Alternate<AF2>>,
-            PE8<Alternate<AF1>>,
-            PF8<Alternate<AF6>>
+            gpio::PA2<AF2>,
+            gpio::PE8<AF1>,
+            gpio::PF8<AF6>
         ]
         CH4(ComplementaryImpossible): [
-            PA3<Alternate<AF2>>,
-            PE9<Alternate<AF1>>,
-            PF9<Alternate<AF6>>
+            gpio::PA3<AF2>,
+            gpio::PE9<AF1>,
+            gpio::PF9<AF6>
         ]
         CH1N: []
         CH2N: []
@@ -814,53 +806,53 @@ pins! {
 pins! {
     TIM8:
         CH1(ComplementaryDisabled): [
-            PA15<Alternate<AF2>>,
-            PB6<Alternate<AF5>>,
-            PC6<Alternate<AF4>>
+            gpio::PA15<AF2>,
+            gpio::PB6<AF5>,
+            gpio::PC6<AF4>
         ]
         CH2(ComplementaryDisabled): [
-            PA14<Alternate<AF5>>,
-            PB8<Alternate<AF10>>,
-            PC7<Alternate<AF4>>
+            gpio::PA14<AF5>,
+            gpio::PB8<AF10>,
+            gpio::PC7<AF4>
         ]
         CH3(ComplementaryDisabled): [
-            PB9<Alternate<AF10>>,
-            PC8<Alternate<AF4>>
+            gpio::PB9<AF10>,
+            gpio::PC8<AF4>
         ]
         CH4(ComplementaryDisabled): [
-            PC9<Alternate<AF4>>,
-            PD1<Alternate<AF4>>
+            gpio::PC9<AF4>,
+            gpio::PD1<AF4>
         ]
         CH1N: [
-            PA7<Alternate<AF4>>,
-            PB3<Alternate<AF4>>,
-            PC10<Alternate<AF4>>
+            gpio::PA7<AF4>,
+            gpio::PB3<AF4>,
+            gpio::PC10<AF4>
         ]
         CH2N: [
-            PB0<Alternate<AF4>>,
-            PB4<Alternate<AF4>>,
-            PC11<Alternate<AF4>>
+            gpio::PB0<AF4>,
+            gpio::PB4<AF4>,
+            gpio::PC11<AF4>
         ]
         CH3N: [
-            PB1<Alternate<AF4>>,
-            PB5<Alternate<AF3>>,
-            PC12<Alternate<AF4>>
+            gpio::PB1<AF4>,
+            gpio::PB5<AF3>,
+            gpio::PC12<AF4>
         ]
         CH4N: [
-            PC13<Alternate<AF6>>,
-            PD0<Alternate<AF6>>
+            gpio::PC13<AF6>,
+            gpio::PD0<AF6>
         ]
         BRK: [
-            PA0<Alternate<AF9>>,
-            PA6<Alternate<AF4>>,
-            PA10<Alternate<AF11>>,
-            PB7<Alternate<AF5>>,
-            PD2<Alternate<AF4>>
+            gpio::PA0<AF9>,
+            gpio::PA6<AF4>,
+            gpio::PA10<AF11>,
+            gpio::PB7<AF5>,
+            gpio::PD2<AF4>
         ]
         BRK2: [
-            PB6<Alternate<AF10>>,
-            PC9<Alternate<AF6>>,
-            PD1<Alternate<AF6>>
+            gpio::PB6<AF10>,
+            gpio::PC9<AF6>,
+            gpio::PD1<AF6>
         ]
 }
 #[cfg(any(
@@ -874,108 +866,108 @@ pins! {
 pins! {
     TIM20:
         CH1(ComplementaryDisabled): [
-            PB2<Alternate<AF3>>,
-            PE2<Alternate<AF6>>,
+            gpio::PB2<AF3>,
+            gpio::PE2<AF6>,
             #[cfg(any(
                 feature = "stm32g473",
                 feature = "stm32g474",
                 feature = "stm32g483",
                 feature = "stm32g484",
             ))]
-            PF12<Alternate<AF2>>
+            gpio::PF12<AF2>
         ]
         CH2(ComplementaryDisabled): [
-            PC2<Alternate<AF6>>,
-            PE3<Alternate<AF6>>,
+            gpio::PC2<AF6>,
+            gpio::PE3<AF6>,
             #[cfg(any(
                 feature = "stm32g473",
                 feature = "stm32g474",
                 feature = "stm32g483",
                 feature = "stm32g484",
             ))]
-            PF13<Alternate<AF2>>
+            gpio::PF13<AF2>
         ]
         CH3(ComplementaryDisabled): [
-            PC8<Alternate<AF6>>,
-            PF2<Alternate<AF2>>,
+            gpio::PC8<AF6>,
+            gpio::PF2<AF2>,
             #[cfg(any(
                 feature = "stm32g473",
                 feature = "stm32g474",
                 feature = "stm32g483",
                 feature = "stm32g484",
             ))]
-            PF14<Alternate<AF2>>
+            gpio::PF14<AF2>
         ]
         CH4(ComplementaryDisabled): [
-            PE1<Alternate<AF4>>,
+            gpio::PE1<AF4>,
             #[cfg(any(
                 feature = "stm32g473",
                 feature = "stm32g474",
                 feature = "stm32g483",
                 feature = "stm32g484",
             ))]
-            PF3<Alternate<AF2>>,
+            gpio::PF3<AF2>,
             #[cfg(any(
                 feature = "stm32g473",
                 feature = "stm32g474",
                 feature = "stm32g483",
                 feature = "stm32g484",
             ))]
-            PF15<Alternate<AF2>>
+            gpio::PF15<AF2>
         ]
         CH1N: [
-            PE4<Alternate<AF6>>,
+            gpio::PE4<AF6>,
             #[cfg(any(
                 feature = "stm32g473",
                 feature = "stm32g474",
                 feature = "stm32g483",
                 feature = "stm32g484",
             ))]
-            PF4<Alternate<AF3>>,
+            gpio::PF4<AF3>,
             #[cfg(any(
                 feature = "stm32g473",
                 feature = "stm32g474",
                 feature = "stm32g483",
                 feature = "stm32g484",
             ))]
-            PG0<Alternate<AF2>>
+            gpio::PG0<AF2>
         ]
         CH2N: [
-            PE5<Alternate<AF6>>,
+            gpio::PE5<AF6>,
             #[cfg(any(
                 feature = "stm32g473",
                 feature = "stm32g474",
                 feature = "stm32g483",
                 feature = "stm32g484",
             ))]
-            PF5<Alternate<AF2>>,
+            gpio::PF5<AF2>,
             #[cfg(any(
                 feature = "stm32g473",
                 feature = "stm32g474",
                 feature = "stm32g483",
                 feature = "stm32g484",
             ))]
-            PG1<Alternate<AF2>>
+            gpio::PG1<AF2>
         ]
         CH3N: [
-            PE6<Alternate<AF6>>,
+            gpio::PE6<AF6>,
             #[cfg(any(
                 feature = "stm32g473",
                 feature = "stm32g474",
                 feature = "stm32g483",
                 feature = "stm32g484",
             ))]
-            PG2<Alternate<AF2>>
+            gpio::PG2<AF2>
         ]
         CH4N: [
-            PE0<Alternate<AF3>>,
+            gpio::PE0<AF3>,
             #[cfg(any(
                 feature = "stm32g473",
                 feature = "stm32g474",
                 feature = "stm32g483",
                 feature = "stm32g484",
             ))]
-            PG3<Alternate<AF6>>
+            gpio::PG3<AF6>
         ]
         BRK: [
             #[cfg(any(
@@ -984,22 +976,22 @@ pins! {
                 feature = "stm32g483",
                 feature = "stm32g484",
             ))]
-            PF7<Alternate<AF2>>,
-            PF9<Alternate<AF2>>,
+            gpio::PF7<AF2>,
+            gpio::PF9<AF2>,
             #[cfg(any(
                 feature = "stm32g473",
                 feature = "stm32g474",
                 feature = "stm32g483",
                 feature = "stm32g484",
             ))]
-            PG3<Alternate<AF2>>,
+            gpio::PG3<AF2>,
             #[cfg(any(
                 feature = "stm32g473",
                 feature = "stm32g474",
                 feature = "stm32g483",
                 feature = "stm32g484",
             ))]
-            PG6<Alternate<AF2>>
+            gpio::PG6<AF2>
         ]
         BRK2: [
             #[cfg(any(
@@ -1008,15 +1000,15 @@ pins! {
                 feature = "stm32g483",
                 feature = "stm32g484",
             ))]
-            PF8<Alternate<AF2>>,
-            PF10<Alternate<AF2>>,
+            gpio::PF8<AF2>,
+            gpio::PF10<AF2>,
             #[cfg(any(
                 feature = "stm32g473",
                 feature = "stm32g474",
                 feature = "stm32g483",
                 feature = "stm32g484",
             ))]
-            PG4<Alternate<AF2>>
+            gpio::PG4<AF2>
         ]
 }
 
diff --git a/src/rcc/clockout.rs b/src/rcc/clockout.rs
index b9f49944..1be1e390 100644
--- a/src/rcc/clockout.rs
+++ b/src/rcc/clockout.rs
@@ -5,7 +5,7 @@ use crate::stm32::RCC;
 pub type LscoPin = gpioa::PA2<DefaultMode>;
 
 pub struct Lsco {
-    pin: gpioa::PA2<Alternate<AF0>>,
+    pin: gpioa::PA2<AF0>,
 }
 
 impl Lsco {
@@ -77,8 +77,8 @@ pub trait MCOExt<PIN> {
 macro_rules! mco {
     ($($PIN:ident),+) => {
         $(
-            impl MCOExt<$PIN<Alternate<AF0>>> for $PIN<DefaultMode> {
-                fn mco(self, src: MCOSrc, psc: Prescaler, rcc: &mut Rcc) -> Mco<$PIN<Alternate<AF0>>> {
+            impl MCOExt<crate::gpio::$PIN<AF0>> for crate::gpio::$PIN<DefaultMode> {
+                fn mco(self, src: MCOSrc, psc: Prescaler, rcc: &mut Rcc) -> Mco<crate::gpio::$PIN<AF0>> {
                     let psc_bits = match psc {
                         Prescaler::NotDivided => 0b000,
                         Prescaler::Div2 => 0b001,
@@ -120,7 +120,4 @@ macro_rules! mco {
     };
 }
 
-use crate::gpio::gpioa::PA8;
-use crate::gpio::gpiog::PG10;
-
 mco!(PA8, PG10);
diff --git a/src/serial/usart.rs b/src/serial/usart.rs
index 09288991..66ab45a6 100644
--- a/src/serial/usart.rs
+++ b/src/serial/usart.rs
@@ -4,8 +4,7 @@ use core::marker::PhantomData;
 use crate::dma::{
     mux::DmaMuxResources, traits::TargetAddress, MemoryToPeripheral, PeripheralToMemory,
 };
-use crate::gpio::{gpioa::*, gpiob::*, gpioc::*, gpiod::*, gpioe::*, gpiog::*};
-use crate::gpio::{Alternate, AlternateOD, AF12, AF5, AF7, AF8};
+use crate::gpio::{self, OpenDrain};
 use crate::rcc::{Enable, GetBusFreq, Rcc, RccBus, Reset};
 use crate::stm32::*;
 
@@ -165,20 +164,21 @@ where
 
 macro_rules! uart_shared {
     ($USARTX:ident, $dmamux_rx:ident, $dmamux_tx:ident,
-        tx: [ $($( #[ $pmeta1:meta ] )* ($PTX:ident, $TAF:expr),)+ ],
-        rx: [ $($( #[ $pmeta2:meta ] )* ($PRX:ident, $RAF:expr),)+ ]) => {
+        tx: [ $($( #[ $pmeta1:meta ] )* ($PTX:ident, $TAF:ident),)+ ],
+        rx: [ $($( #[ $pmeta2:meta ] )* ($PRX:ident, $RAF:ident),)+ ]) => {
 
         $(
             $( #[ $pmeta1 ] )*
-            impl TxPin<$USARTX> for $PTX<Alternate<$TAF>> {
+            impl TxPin<$USARTX> for gpio::$PTX<gpio::$TAF> {
             }
-            impl TxPin<$USARTX> for $PTX<AlternateOD<$TAF>> {
+            $( #[ $pmeta1 ] )*
+            impl TxPin<$USARTX> for gpio::$PTX<gpio::$TAF<OpenDrain>> {
             }
         )+
 
         $(
             $( #[ $pmeta2 ] )*
-            impl RxPin<$USARTX> for $PRX<Alternate<$RAF>> {
+            impl RxPin<$USARTX> for gpio::$PRX<gpio::$RAF> {
             }
         )+
 
diff --git a/src/spi.rs b/src/spi.rs
index 19bd2fef..34e98847 100644
--- a/src/spi.rs
+++ b/src/spi.rs
@@ -1,14 +1,7 @@
 use crate::dma::mux::DmaMuxResources;
 use crate::dma::traits::TargetAddress;
 use crate::dma::MemoryToPeripheral;
-use crate::gpio::{gpioa::*, gpiob::*, gpioc::*, gpiof::*, Alternate, AF5, AF6};
-#[cfg(any(
-    feature = "stm32g473",
-    feature = "stm32g474",
-    feature = "stm32g483",
-    feature = "stm32g484"
-))]
-use crate::gpio::{gpioe::*, gpiog::*};
+use crate::gpio;
 use crate::rcc::{Enable, GetBusFreq, Rcc, RccBus, Reset};
 #[cfg(any(
     feature = "stm32g473",
@@ -94,9 +87,9 @@ impl FrameSize for u16 {
 
 macro_rules! spi {
     ($SPIX:ident, $spiX:ident,
-        sck: [ $($( #[ $pmetasck:meta ] )* $SCK:ty,)+ ],
-        miso: [ $($( #[ $pmetamiso:meta ] )* $MISO:ty,)+ ],
-        mosi: [ $($( #[ $pmetamosi:meta ] )* $MOSI:ty,)+ ],
+        sck: [ $($( #[ $pmetasck:meta ] )* $SCK:ident<$ASCK:ident>,)+ ],
+        miso: [ $($( #[ $pmetamiso:meta ] )* $MISO:ident<$AMISO:ident>,)+ ],
+        mosi: [ $($( #[ $pmetamosi:meta ] )* $MOSI:ident<$AMOSI:ident>,)+ ],
         $mux:expr,
     ) => {
         impl PinSck<$SPIX> for NoSck {}
@@ -107,15 +100,15 @@ macro_rules! spi {
 
         $(
             $( #[ $pmetasck ] )*
-            impl PinSck<$SPIX> for $SCK {}
+            impl PinSck<$SPIX> for gpio::$SCK<gpio::$ASCK> {}
         )*
         $(
             $( #[ $pmetamiso ] )*
-            impl PinMiso<$SPIX> for $MISO {}
+            impl PinMiso<$SPIX> for gpio::$MISO<gpio::$AMISO> {}
         )*
         $(
             $( #[ $pmetamosi ] )*
-            impl PinMosi<$SPIX> for $MOSI {}
+            impl PinMosi<$SPIX> for gpio::$MOSI<gpio::$AMOSI> {}
         )*
 
         impl<PINS: Pins<$SPIX>> Spi<$SPIX, PINS> {
@@ -377,37 +370,37 @@ spi!(
     SPI1,
     spi1,
     sck: [
-        PA5<Alternate<AF5>>,
-        PB3<Alternate<AF5>>,
+        PA5<AF5>,
+        PB3<AF5>,
         #[cfg(any(
             feature = "stm32g473",
             feature = "stm32g474",
             feature = "stm32g483",
             feature = "stm32g484"
         ))]
-        PG2<Alternate<AF5>>,
+        PG2<AF5>,
     ],
     miso: [
-        PA6<Alternate<AF5>>,
-        PB4<Alternate<AF5>>,
+        PA6<AF5>,
+        PB4<AF5>,
         #[cfg(any(
             feature = "stm32g473",
             feature = "stm32g474",
             feature = "stm32g483",
             feature = "stm32g484"
         ))]
-        PG3<Alternate<AF5>>,
+        PG3<AF5>,
     ],
     mosi: [
-        PA7<Alternate<AF5>>,
-        PB5<Alternate<AF5>>,
+        PA7<AF5>,
+        PB5<AF5>,
         #[cfg(any(
             feature = "stm32g473",
             feature = "stm32g474",
             feature = "stm32g483",
             feature = "stm32g484"
         ))]
-        PG4<Alternate<AF5>>,
+        PG4<AF5>,
     ],
     DmaMuxResources::SPI1_TX,
 );
@@ -416,18 +409,18 @@ spi!(
     SPI2,
     spi2,
     sck: [
-        PF1<Alternate<AF5>>,
-        PF9<Alternate<AF5>>,
-        PF10<Alternate<AF5>>,
-        PB13<Alternate<AF5>>,
+        PF1<AF5>,
+        PF9<AF5>,
+        PF10<AF5>,
+        PB13<AF5>,
     ],
     miso: [
-        PA10<Alternate<AF5>>,
-        PB14<Alternate<AF5>>,
+        PA10<AF5>,
+        PB14<AF5>,
     ],
     mosi: [
-        PA11<Alternate<AF5>>,
-        PB15<Alternate<AF5>>,
+        PA11<AF5>,
+        PB15<AF5>,
     ],
     DmaMuxResources::SPI2_TX,
 );
@@ -436,23 +429,23 @@ spi!(
     SPI3,
     spi3,
     sck: [
-        PB3<Alternate<AF6>>,
-        PC10<Alternate<AF6>>,
+        PB3<AF6>,
+        PC10<AF6>,
         #[cfg(any(
             feature = "stm32g473",
             feature = "stm32g474",
             feature = "stm32g483",
             feature = "stm32g484"
         ))]
-        PG9<Alternate<AF6>>,
+        PG9<AF6>,
     ],
     miso: [
-        PB4<Alternate<AF6>>,
-        PC11<Alternate<AF6>>,
+        PB4<AF6>,
+        PC11<AF6>,
     ],
     mosi: [
-        PB5<Alternate<AF6>>,
-        PC12<Alternate<AF6>>,
+        PB5<AF6>,
+        PC12<AF6>,
     ],
     DmaMuxResources::SPI3_TX,
 );
@@ -467,16 +460,16 @@ spi!(
     SPI4,
     spi4,
     sck: [
-        PE2<Alternate<AF5>>,
-        PE12<Alternate<AF5>>,
+        PE2<AF5>,
+        PE12<AF5>,
     ],
     miso: [
-        PE5<Alternate<AF5>>,
-        PE13<Alternate<AF5>>,
+        PE5<AF5>,
+        PE13<AF5>,
     ],
     mosi: [
-        PE6<Alternate<AF5>>,
-        PE14<Alternate<AF5>>,
+        PE6<AF5>,
+        PE14<AF5>,
     ],
     DmaMuxResources::SPI4_TX,
 );
diff --git a/src/usb.rs b/src/usb.rs
index 0d9181c8..2af84efe 100644
--- a/src/usb.rs
+++ b/src/usb.rs
@@ -5,7 +5,6 @@
 pub use stm32_usbd::UsbBus;
 
 use crate::gpio;
-use crate::gpio::gpioa::{PA11, PA12};
 use crate::rcc::{Enable, Reset};
 use crate::stm32::{RCC, USB};
 use core::fmt;
@@ -17,8 +16,8 @@ pub trait DmPin: crate::Sealed {}
 /// Trait implemented by all pins that can be the "D+" pin for the USB peripheral
 pub trait DpPin: crate::Sealed {}
 
-impl DmPin for PA11<gpio::Alternate<{ gpio::AF14 }>> {}
-impl DpPin for PA12<gpio::Alternate<{ gpio::AF14 }>> {}
+impl DmPin for gpio::PA11<gpio::AF14> {}
+impl DpPin for gpio::PA12<gpio::AF14> {}
 
 pub struct Peripheral<Dm: DmPin, Dp: DpPin> {
     /// USB register block
diff --git a/tests/nucleo-g474.rs b/tests/nucleo-g474.rs
index 5188a6ae..8d142796 100644
--- a/tests/nucleo-g474.rs
+++ b/tests/nucleo-g474.rs
@@ -45,7 +45,7 @@ mod tests {
         },
         dac::{DacExt, DacOut},
         delay::SYSTDelayExt,
-        gpio::{GpioExt, AF6},
+        gpio::{GpioExt, AF6, PA8},
         pwm::PwmExt,
         rcc::RccExt,
         signature::{VrefCal, VDDA_CALIB},
@@ -135,8 +135,7 @@ mod tests {
 
         let gpioa = dp.GPIOA.split(&mut rcc);
         let _pa1_important_dont_use_as_output = gpioa.pa1.into_floating_input();
-        let pin: stm32g4xx_hal::gpio::gpioa::PA8<stm32g4xx_hal::gpio::Alternate<AF6>> =
-            gpioa.pa8.into_alternate();
+        let pin: PA8<AF6> = gpioa.pa8.into_alternate();
 
         let mut pwm = dp.TIM1.pwm(pin, 1000u32.Hz(), &mut rcc);