feat(simd): add AVX2 backend (v0.2.0)

Specializes pack 1/8/16/32 and unpack 8/16/32 with 256-bit kernels;
other widths delegate to SseBackend with byte-identical output.
Bench shows 6-8x pack speedup at widths 8 and 16.

CI extended: release-mode tests, miri (scalar via cfg(miri)),
macOS/Windows matrix, fuzz no longer masks crashes (300s/target).

Author: bravo1goingdark

.github/workflows/ci.yml

@@ -8,10 +8,14 @@ on:
 
 jobs:
   test:
-    runs-on: ubuntu-latest
+    runs-on: ${{ matrix.os }}
     strategy:
       fail-fast: false
       matrix:
+        os:
+          - ubuntu-latest
+          - macos-latest
+          - windows-latest
         rust:
           - stable
           - beta
@@ -26,6 +30,18 @@ jobs:
       - run: cargo test --test edge_cases
       - run: cargo test --tests --all-features
 
+  test-release:
+    runs-on: ubuntu-latest
+    steps:
+      - uses: actions/checkout@v4
+      - uses: dtolnay/rust-toolchain@master
+        with:
+          toolchain: stable
+      - run: cargo test --release --lib
+      - run: cargo test --release --test correctness
+      - run: cargo test --release --test edge_cases
+      - run: cargo test --release --doc
+
   clippy:
     runs-on: ubuntu-latest
     steps:
@@ -55,6 +71,23 @@ jobs:
           toolchain: stable
       - run: cargo test --doc
 
+  miri:
+    runs-on: ubuntu-latest
+    steps:
+      - uses: actions/checkout@v4
+      - uses: dtolnay/rust-toolchain@master
+        with:
+          toolchain: nightly
+          components: miri
+      # Miri cannot interpret x86 SIMD intrinsics, so the dispatch layer
+      # forces the scalar backend under cfg(miri). This run validates the
+      # public API and the scalar reference under interpretation; it skips
+      # the SSE/AVX2 module-internal tests, which would still attempt to
+      # call intrinsics directly.
+      - run: cargo miri test --lib -- --skip simd::sse::tests --skip simd::avx2::tests
+      - run: cargo miri test --test correctness
+      - run: cargo miri test --test edge_cases
+
   fuzz:
     runs-on: ubuntu-latest
     steps:
@@ -65,8 +98,8 @@ jobs:
       - name: Install cargo-fuzz
         run: cargo install cargo-fuzz
       - name: Run fuzz_roundtrip
-        run: cargo fuzz run roundtrip -- -max_total_time=60s -timeout=10s || true
+        run: cargo fuzz run roundtrip -- -max_total_time=300s -timeout=10s
       - name: Run fuzz_compress_only
-        run: cargo fuzz run compress_only -- -max_total_time=60s -timeout=10s || true
+        run: cargo fuzz run compress_only -- -max_total_time=300s -timeout=10s
       - name: Run fuzz_decompress_only
-        run: cargo fuzz run decompress_only -- -max_total_time=60s -timeout=10s || true
+        run: cargo fuzz run decompress_only -- -max_total_time=300s -timeout=10s

CHANGELOG.md

@@ -5,6 +5,24 @@ All notable changes to this project will be documented in this file.
 The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.1.0/),
 and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).
 
+## [0.2.0] - 2026-04-13
+
+### Added
+- AVX2 backend (`Avx2Backend` in `src/simd/avx2.rs`) with native 256-bit kernels for widths 1 (pack), 4 (unpack), 8, 16, and 32. All other widths delegate to `SseBackend`, preserving byte-identical output across backends.
+- Dispatch routing: `BackendType::Avx2` now resolves to `Avx2Backend` (was previously falling through to SSE). `BackendType::Avx512` falls through to `Avx2Backend` until a dedicated AVX-512 kernel ships.
+- AVX2-internal tests: byte-for-byte SSE compatibility, scalar parity, roundtrip, boundary patterns, and invalid-input handling, all gated on `is_x86_feature_detected!("avx2")`.
+- AVX2 column added to `benches/throughput_comparison.rs` for direct scalar/SSE/AVX2 comparison.
+- `cfg(miri)` override in `dispatch::detect_best_backend` so `cargo miri test` exercises the scalar backend without choking on x86 SIMD intrinsics.
+- CI matrix expanded to test on Linux, macOS, and Windows; release-mode test job added.
+- CI now fails on fuzz crashes (previously masked with `|| true`); fuzz duration bumped from 60s to 300s per target.
+
+### Changed
+- Lane-crossing handling: every `_mm256_packus_epi*` is followed by `_mm256_permute4x64_epi64::<0xD8>` to restore linear in-memory order, ensuring AVX2 output is byte-identical to SSE/scalar.
+- Doc comments in `compress`, `decompress`, and `lib.rs` now mention AVX2 alongside SSE4.1.
+- `internal::SseBackend` re-export is now gated on `target_arch = "x86_64"` so the crate compiles on non-x86_64 targets (aarch64, wasm32, etc.).
+
+[0.2.0]: https://github.com/themankindproject/simd-bp128-rs/releases/tag/v0.2.0
+
 ## [0.1.1] - 2026-04-03
 
 ### Added

Cargo.lock

@@ -1,6 +1,6 @@
 [package]
 name = "packsimd"
-version = "0.1.1"
+version = "0.2.0"
 edition = "2021"
 authors = ["Ashutosh Kumar <kumarashutosh34169@gmail.com>"]
 description = "SIMD-accelerated bit packing compression for u32 arrays"

Cargo.toml

@@ -6,9 +6,7 @@
 [![Build Status](https://img.shields.io/github/actions/workflow/status/themankindproject/simd-bp128-rs/ci.yml)](https://github.com/themankindproject/packsimd/actions)
 ![Rust Version](https://img.shields.io/badge/rust-1.70%2B-blue)
 
-> **Note:** This release includes the **Scalar** and **SSE4.1** backends only. AVX2 and AVX-512 implementations are planned for a future release. On x86_64 CPUs with SSE4.1, the SSE4.1 backend is used automatically.
-
-High-performance BP128 compression for `u32` integer arrays with **SIMD acceleration**, **zero-allocation APIs**, and **deterministic encoding**.
+High-performance BP128 compression for `u32` integer arrays with **SIMD acceleration**, **zero-allocation APIs**, and **deterministic encoding**. The crate ships **scalar**, **SSE4.1**, and **AVX2** backends and selects the best one at runtime. AVX-512 is planned for a future release.
 
 ## Overview
 
@@ -25,7 +23,7 @@ High-performance BP128 compression for `u32` integer arrays with **SIMD accelera
 ## Features
 
 - **BP128 Algorithm** — Variable bit-width packing, 128 values per block
-- **SIMD Acceleration** — SSE4.1 on x86_64 with automatic runtime detection
+- **SIMD Acceleration** — AVX2 and SSE4.1 on x86_64 with automatic runtime detection
 - **Scalar Fallback** — Reference implementation for non-SIMD targets
 - **Zero-Allocation API** — `compress_into` / `decompress_into` with pre-allocated buffers
 - **Fast Header Inspection** — `decompressed_len` reads size without decompressing
@@ -38,7 +36,7 @@ High-performance BP128 compression for `u32` integer arrays with **SIMD accelera
 
 ```toml
 [dependencies]
-packsimd = "0.1"
+packsimd = "0.2"
 ```
 
 ## Quick Start
@@ -99,7 +97,7 @@ For complete API reference and usage examples, see [USAGE.md](USAGE.md).
        │               │               │
   ┌────┴────┐    ┌─────┴─────┐   ┌────┴────┐
   │ Scalar  │    │   SSE4.1  │   │  AVX2   │
-  │Backend  │    │  Backend  │   │(planned)│
+  │Backend  │    │  Backend  │   │ Backend │
   │         │    │           │   │         │
   │Reference│    │  128-bit  │   │ 256-bit │
   │  impl   │    │   SIMD    │   │  SIMD   │
@@ -114,6 +112,7 @@ For complete API reference and usage examples, see [USAGE.md](USAGE.md).
 | **dispatch** | Runtime SIMD backend selection and caching |
 | **simd/scalar** | Reference scalar implementation (all bit widths) |
 | **simd/sse** | SSE4.1-accelerated kernels (x86_64 only) |
+| **simd/avx2** | AVX2-accelerated kernels for byte-aligned widths and 1-bit pack (x86_64 only) |
 
 ## Performance
 
@@ -193,7 +192,8 @@ cargo doc --no-deps --open
 |:--------|:-------|
 | Scalar implementation | Done |
 | SSE4.1 backend | Done |
-| AVX2 backend | Planned |
+| AVX2 backend | Done |
+| BMI2 PDEP/PEXT for irregular widths | Planned |
 | AVX-512 backend | Planned |
 
 ## License

README.md

@@ -32,7 +32,7 @@ Add the dependency to your `Cargo.toml`:
 
 ```toml
 [dependencies]
-packsimd = "0.1"
+packsimd = "0.2"
 ```
 
 ### Basic Example

USAGE.md

@@ -1,4 +1,4 @@
-//! Scalar vs SSE block-level kernel comparison.
+//! Scalar vs SSE vs AVX2 block-level kernel comparison.
 //!
 //! Run with: cargo bench --bench throughput_comparison
 //!
@@ -13,7 +13,7 @@ use std::hint::black_box;
 use std::time::Duration;
 
 #[cfg(target_arch = "x86_64")]
-use packsimd::internal::SseBackend;
+use packsimd::internal::{Avx2Backend, SseBackend};
 
 fn generate_block(bits: u32) -> [u32; 128] {
     let mut rng = StdRng::seed_from_u64(42);
@@ -34,8 +34,8 @@ fn packed_bytes(bits: u32) -> usize {
 }
 
 fn benchmark_scalar_vs_sse(c: &mut Criterion) {
-    let mut group = c.benchmark_group("scalar_vs_sse");
-    group.measurement_time(Duration::from_secs(5));
+    let mut group = c.benchmark_group("scalar_vs_sse_vs_avx2");
+    group.measurement_time(Duration::from_secs(3));
     group.sample_size(100);
 
     for bits in [1u8, 2, 4, 8, 16, 24, 32] {
@@ -47,10 +47,16 @@ fn benchmark_scalar_vs_sse(c: &mut Criterion) {
         let mut scalar_unpacked = [0u32; 128];
         let mut sse_packed = vec![0u8; bytes_needed];
         let mut sse_unpacked = [0u32; 128];
+        #[cfg(target_arch = "x86_64")]
+        let mut avx2_packed = vec![0u8; bytes_needed];
+        #[cfg(target_arch = "x86_64")]
+        let mut avx2_unpacked = [0u32; 128];
 
         ScalarBackend::pack_block(&block, bits, &mut scalar_packed).unwrap();
         #[cfg(target_arch = "x86_64")]
         SseBackend::pack_block(&block, bits, &mut sse_packed).unwrap();
+        #[cfg(target_arch = "x86_64")]
+        Avx2Backend::pack_block(&block, bits, &mut avx2_packed).unwrap();
 
         group.throughput(Throughput::Bytes(input_bytes as u64));
         group.bench_function(format!("scalar_pack_{}bit", bits), |b| {
@@ -77,6 +83,18 @@ fn benchmark_scalar_vs_sse(c: &mut Criterion) {
                     .unwrap();
                 });
             });
+
+            group.throughput(Throughput::Bytes(input_bytes as u64));
+            group.bench_function(format!("avx2_pack_{}bit", bits), |b| {
+                b.iter(|| {
+                    Avx2Backend::pack_block(
+                        black_box(&block),
+                        black_box(bits),
+                        black_box(&mut avx2_packed),
+                    )
+                    .unwrap();
+                });
+            });
         }
 
         group.throughput(Throughput::Bytes(bytes_needed as u64));
@@ -104,6 +122,18 @@ fn benchmark_scalar_vs_sse(c: &mut Criterion) {
                     .unwrap();
                 });
             });
+
+            group.throughput(Throughput::Bytes(bytes_needed as u64));
+            group.bench_function(format!("avx2_unpack_{}bit", bits), |b| {
+                b.iter(|| {
+                    Avx2Backend::unpack_block(
+                        black_box(&avx2_packed),
+                        black_box(bits),
+                        black_box(&mut avx2_unpacked),
+                    )
+                    .unwrap();
+                });
+            });
         }
     }
 

benches/throughput_comparison.rs

@@ -80,7 +80,7 @@ pub fn max_compressed_size(input_len: usize) -> usize {
 ///
 /// - Time complexity: O(n) where n = `input.len()`
 /// - Space complexity: O(1) — no heap allocation
-/// - Automatically selects the best available SIMD backend (SSE4.1 on x86_64, scalar fallback otherwise)
+/// - Automatically selects the best available SIMD backend (AVX2 / SSE4.1 on x86_64, scalar fallback otherwise)
 ///
 /// # Errors
 ///

src/compress.rs

@@ -165,7 +165,7 @@ fn parse_header(input: &[u8]) -> Result<ParsedHeader, DecompressionError> {
 ///
 /// - Time complexity: O(n) where n = number of decompressed values
 /// - Space complexity: O(1) — no heap allocation
-/// - Automatically selects the best available SIMD backend (SSE4.1 on x86_64, scalar fallback otherwise)
+/// - Automatically selects the best available SIMD backend (AVX2 / SSE4.1 on x86_64, scalar fallback otherwise)
 ///
 /// # Errors
 ///

src/decompress.rs

@@ -2,6 +2,8 @@ use crate::error::Error;
 use crate::simd::scalar::ScalarBackend;
 use crate::simd::SimdBackend;
 
+#[cfg(target_arch = "x86_64")]
+use crate::simd::avx2::Avx2Backend;
 #[cfg(target_arch = "x86_64")]
 use crate::simd::sse::SseBackend;
 
@@ -16,15 +18,24 @@ pub(crate) enum BackendType {
     Scalar,
     #[cfg(target_arch = "x86_64")]
     Sse,
-    // AVX2 and AVX512 are detected but currently fall back to SSE
-    // because the SSE implementation is correct and feature-complete.
-    // Dedicated AVX2/AVX512 kernels are planned.
+    // AVX2 has a dedicated kernel (specializes byte-aligned widths and 1-bit
+    // pack, delegates the rest to SseBackend). AVX-512 detection currently
+    // falls through to the AVX2 backend until a dedicated kernel lands.
     #[cfg(target_arch = "x86_64")]
     Avx2,
     #[cfg(target_arch = "x86_64")]
     Avx512,
 }
 
+// Miri cannot interpret x86 SIMD intrinsics, so force the scalar
+// reference under miri. This lets `cargo miri test` validate the
+// public API and the scalar backend without choking on intrinsics.
+#[cfg(miri)]
+pub(crate) fn detect_best_backend() -> BackendType {
+    BackendType::Scalar
+}
+
+#[cfg(not(miri))]
 pub(crate) fn detect_best_backend() -> BackendType {
     #[cfg(target_arch = "x86_64")]
     {
@@ -58,7 +69,9 @@ pub(crate) fn get_pack_fn() -> PackFn {
     match get_backend() {
         BackendType::Scalar => ScalarBackend::pack_block,
         #[cfg(target_arch = "x86_64")]
-        BackendType::Sse | BackendType::Avx2 | BackendType::Avx512 => SseBackend::pack_block,
+        BackendType::Sse => SseBackend::pack_block,
+        #[cfg(target_arch = "x86_64")]
+        BackendType::Avx2 | BackendType::Avx512 => Avx2Backend::pack_block,
     }
 }
 
@@ -68,7 +81,9 @@ pub(crate) fn get_unpack_fn() -> UnpackFn {
     match get_backend() {
         BackendType::Scalar => ScalarBackend::unpack_block,
         #[cfg(target_arch = "x86_64")]
-        BackendType::Sse | BackendType::Avx2 | BackendType::Avx512 => SseBackend::unpack_block,
+        BackendType::Sse => SseBackend::unpack_block,
+        #[cfg(target_arch = "x86_64")]
+        BackendType::Avx2 | BackendType::Avx512 => Avx2Backend::unpack_block,
     }
 }