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[a64] Optimize zero MovMem64
Read direction from the ZR in the case that we are just storing a 64 or 32 bit zero
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src/xenia/cpu/backend/a64/a64_emitter.cc

Lines changed: 7 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -645,7 +645,6 @@ oaknut::XReg A64Emitter::GetContextReg() { return X27; }
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oaknut::XReg A64Emitter::GetMembaseReg() { return X28; }
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void A64Emitter::ReloadContext() {
648-
// mov(GetContextReg(), qword[rsp + StackLayout::GUEST_CTX_HOME]);
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LDR(GetContextReg(), SP, StackLayout::GUEST_CTX_HOME);
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}
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@@ -667,20 +666,13 @@ bool A64Emitter::ConstantFitsIn32Reg(uint64_t v) {
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void A64Emitter::MovMem64(const oaknut::XRegSp& addr, intptr_t offset,
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uint64_t v) {
670-
// if ((v & ~0x7FFFFFFF) == 0) {
671-
// // Fits under 31 bits, so just load using normal mov.
672-
// mov(qword[addr], v);
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// } else if ((v & ~0x7FFFFFFF) == ~0x7FFFFFFF) {
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// // Negative number that fits in 32bits.
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// mov(qword[addr], v);
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// } else if (!(v >> 32)) {
677-
// // All high bits are zero. It'd be nice if we had a way to load a 32bit
678-
// // immediate without sign extending!
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// // TODO(benvanik): this is super common, find a better way.
680-
// mov(dword[addr], static_cast<uint32_t>(v));
681-
// mov(dword[addr + 4], 0);
682-
// } else
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{
669+
if (v == 0) {
670+
STR(XZR, addr, offset);
671+
} else if (!(v >> 32)) {
672+
// All high bits are zero, 32-bit MOV
673+
MOV(W0, static_cast<uint32_t>(v));
674+
STR(X0, addr, offset);
675+
} else {
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// 64bit number that needs double movs.
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MOV(X0, v);
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STR(X0, addr, offset);

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