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dts: h7: add stm32h7rs mising ETH MII & RMII pinctrl
Add stm32h7rs pinctrl ETH_MII & ETH_RMII Signed-off-by: Mario Paja <[email protected]>
1 parent 007e775 commit ef6adb7

26 files changed

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‎dts/st/h7/stm32h7r3a8ix-pinctrl.dtsi

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Original file line numberDiff line numberDiff line change
@@ -907,6 +907,165 @@
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slew-rate = "very-high-speed";
908908
};
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910+
/* ETH_MII */
911+
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/omit-if-no-ref/ eth_mii_rx_clk_pa1: eth_mii_rx_clk_pa1 {
913+
pinmux = <STM32_PINMUX('A', 1, AF11)>;
914+
slew-rate = "very-high-speed";
915+
};
916+
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/omit-if-no-ref/ eth_mii_col_pa3: eth_mii_col_pa3 {
918+
pinmux = <STM32_PINMUX('A', 3, AF11)>;
919+
slew-rate = "very-high-speed";
920+
};
921+
922+
/omit-if-no-ref/ eth_mii_rx_dv_pa7: eth_mii_rx_dv_pa7 {
923+
pinmux = <STM32_PINMUX('A', 7, AF11)>;
924+
slew-rate = "very-high-speed";
925+
};
926+
927+
/omit-if-no-ref/ eth_mii_txd0_pb0: eth_mii_txd0_pb0 {
928+
pinmux = <STM32_PINMUX('B', 0, AF11)>;
929+
slew-rate = "very-high-speed";
930+
};
931+
932+
/omit-if-no-ref/ eth_mii_txd1_pb1: eth_mii_txd1_pb1 {
933+
pinmux = <STM32_PINMUX('B', 1, AF11)>;
934+
slew-rate = "very-high-speed";
935+
};
936+
937+
/omit-if-no-ref/ eth_mii_rx_clk_pb6: eth_mii_rx_clk_pb6 {
938+
pinmux = <STM32_PINMUX('B', 6, AF11)>;
939+
slew-rate = "very-high-speed";
940+
};
941+
942+
/omit-if-no-ref/ eth_mii_txd1_pb7: eth_mii_txd1_pb7 {
943+
pinmux = <STM32_PINMUX('B', 7, AF11)>;
944+
slew-rate = "very-high-speed";
945+
};
946+
947+
/omit-if-no-ref/ eth_mii_txd3_pb8: eth_mii_txd3_pb8 {
948+
pinmux = <STM32_PINMUX('B', 8, AF11)>;
949+
slew-rate = "very-high-speed";
950+
};
951+
952+
/omit-if-no-ref/ eth_mii_rx_er_pb10: eth_mii_rx_er_pb10 {
953+
pinmux = <STM32_PINMUX('B', 10, AF11)>;
954+
slew-rate = "very-high-speed";
955+
};
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957+
/omit-if-no-ref/ eth_mii_tx_en_pb11: eth_mii_tx_en_pb11 {
958+
pinmux = <STM32_PINMUX('B', 11, AF11)>;
959+
slew-rate = "very-high-speed";
960+
};
961+
962+
/omit-if-no-ref/ eth_mii_rxd3_pb13: eth_mii_rxd3_pb13 {
963+
pinmux = <STM32_PINMUX('B', 13, AF11)>;
964+
slew-rate = "very-high-speed";
965+
};
966+
967+
/omit-if-no-ref/ eth_mii_txd2_pc2: eth_mii_txd2_pc2 {
968+
pinmux = <STM32_PINMUX('C', 2, AF11)>;
969+
slew-rate = "very-high-speed";
970+
};
971+
972+
/omit-if-no-ref/ eth_mii_tx_clk_pc3: eth_mii_tx_clk_pc3 {
973+
pinmux = <STM32_PINMUX('C', 3, AF11)>;
974+
slew-rate = "very-high-speed";
975+
};
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/omit-if-no-ref/ eth_mii_rxd0_pc4: eth_mii_rxd0_pc4 {
978+
pinmux = <STM32_PINMUX('C', 4, AF11)>;
979+
slew-rate = "very-high-speed";
980+
};
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/omit-if-no-ref/ eth_mii_rxd1_pc5: eth_mii_rxd1_pc5 {
983+
pinmux = <STM32_PINMUX('C', 5, AF11)>;
984+
slew-rate = "very-high-speed";
985+
};
986+
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/omit-if-no-ref/ eth_mii_rx_clk_pd7: eth_mii_rx_clk_pd7 {
988+
pinmux = <STM32_PINMUX('D', 7, AF4)>;
989+
slew-rate = "very-high-speed";
990+
};
991+
992+
/omit-if-no-ref/ eth_mii_tx_en_pd8: eth_mii_tx_en_pd8 {
993+
pinmux = <STM32_PINMUX('D', 8, AF11)>;
994+
slew-rate = "very-high-speed";
995+
};
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/omit-if-no-ref/ eth_mii_txd3_pe2: eth_mii_txd3_pe2 {
998+
pinmux = <STM32_PINMUX('E', 2, AF11)>;
999+
slew-rate = "very-high-speed";
1000+
};
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1002+
/omit-if-no-ref/ eth_mii_rxd3_pe3: eth_mii_rxd3_pe3 {
1003+
pinmux = <STM32_PINMUX('E', 3, AF11)>;
1004+
slew-rate = "very-high-speed";
1005+
};
1006+
1007+
/omit-if-no-ref/ eth_mii_rxd2_pf5: eth_mii_rxd2_pf5 {
1008+
pinmux = <STM32_PINMUX('F', 5, AF11)>;
1009+
slew-rate = "very-high-speed";
1010+
};
1011+
1012+
/* ETH_RMII */
1013+
1014+
/omit-if-no-ref/ eth_rmii_ref_clk_pa1: eth_rmii_ref_clk_pa1 {
1015+
pinmux = <STM32_PINMUX('A', 1, AF11)>;
1016+
slew-rate = "very-high-speed";
1017+
};
1018+
1019+
/omit-if-no-ref/ eth_rmii_crs_dv_pa7: eth_rmii_crs_dv_pa7 {
1020+
pinmux = <STM32_PINMUX('A', 7, AF11)>;
1021+
slew-rate = "very-high-speed";
1022+
};
1023+
1024+
/omit-if-no-ref/ eth_rmii_txd0_pb0: eth_rmii_txd0_pb0 {
1025+
pinmux = <STM32_PINMUX('B', 0, AF11)>;
1026+
slew-rate = "very-high-speed";
1027+
};
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1029+
/omit-if-no-ref/ eth_rmii_txd1_pb1: eth_rmii_txd1_pb1 {
1030+
pinmux = <STM32_PINMUX('B', 1, AF11)>;
1031+
slew-rate = "very-high-speed";
1032+
};
1033+
1034+
/omit-if-no-ref/ eth_rmii_ref_clk_pb6: eth_rmii_ref_clk_pb6 {
1035+
pinmux = <STM32_PINMUX('B', 6, AF11)>;
1036+
slew-rate = "very-high-speed";
1037+
};
1038+
1039+
/omit-if-no-ref/ eth_rmii_txd1_pb7: eth_rmii_txd1_pb7 {
1040+
pinmux = <STM32_PINMUX('B', 7, AF11)>;
1041+
slew-rate = "very-high-speed";
1042+
};
1043+
1044+
/omit-if-no-ref/ eth_rmii_tx_en_pb11: eth_rmii_tx_en_pb11 {
1045+
pinmux = <STM32_PINMUX('B', 11, AF11)>;
1046+
slew-rate = "very-high-speed";
1047+
};
1048+
1049+
/omit-if-no-ref/ eth_rmii_rxd0_pc4: eth_rmii_rxd0_pc4 {
1050+
pinmux = <STM32_PINMUX('C', 4, AF11)>;
1051+
slew-rate = "very-high-speed";
1052+
};
1053+
1054+
/omit-if-no-ref/ eth_rmii_rxd1_pc5: eth_rmii_rxd1_pc5 {
1055+
pinmux = <STM32_PINMUX('C', 5, AF11)>;
1056+
slew-rate = "very-high-speed";
1057+
};
1058+
1059+
/omit-if-no-ref/ eth_rmii_ref_clk_pd7: eth_rmii_ref_clk_pd7 {
1060+
pinmux = <STM32_PINMUX('D', 7, AF4)>;
1061+
slew-rate = "very-high-speed";
1062+
};
1063+
1064+
/omit-if-no-ref/ eth_rmii_tx_en_pd8: eth_rmii_tx_en_pd8 {
1065+
pinmux = <STM32_PINMUX('D', 8, AF11)>;
1066+
slew-rate = "very-high-speed";
1067+
};
1068+
9101069
/* FDCAN_RX */
9111070

9121071
/omit-if-no-ref/ fdcan1_rx_pa11: fdcan1_rx_pa11 {

‎dts/st/h7/stm32h7r3i8kx-pinctrl.dtsi

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Original file line numberDiff line numberDiff line change
@@ -968,6 +968,170 @@
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slew-rate = "very-high-speed";
969969
};
970970

971+
/* ETH_MII */
972+
973+
/omit-if-no-ref/ eth_mii_rx_clk_pa1: eth_mii_rx_clk_pa1 {
974+
pinmux = <STM32_PINMUX('A', 1, AF11)>;
975+
slew-rate = "very-high-speed";
976+
};
977+
978+
/omit-if-no-ref/ eth_mii_col_pa3: eth_mii_col_pa3 {
979+
pinmux = <STM32_PINMUX('A', 3, AF11)>;
980+
slew-rate = "very-high-speed";
981+
};
982+
983+
/omit-if-no-ref/ eth_mii_rx_dv_pa7: eth_mii_rx_dv_pa7 {
984+
pinmux = <STM32_PINMUX('A', 7, AF11)>;
985+
slew-rate = "very-high-speed";
986+
};
987+
988+
/omit-if-no-ref/ eth_mii_txd0_pb0: eth_mii_txd0_pb0 {
989+
pinmux = <STM32_PINMUX('B', 0, AF11)>;
990+
slew-rate = "very-high-speed";
991+
};
992+
993+
/omit-if-no-ref/ eth_mii_txd1_pb1: eth_mii_txd1_pb1 {
994+
pinmux = <STM32_PINMUX('B', 1, AF11)>;
995+
slew-rate = "very-high-speed";
996+
};
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998+
/omit-if-no-ref/ eth_mii_rx_clk_pb6: eth_mii_rx_clk_pb6 {
999+
pinmux = <STM32_PINMUX('B', 6, AF11)>;
1000+
slew-rate = "very-high-speed";
1001+
};
1002+
1003+
/omit-if-no-ref/ eth_mii_txd1_pb7: eth_mii_txd1_pb7 {
1004+
pinmux = <STM32_PINMUX('B', 7, AF11)>;
1005+
slew-rate = "very-high-speed";
1006+
};
1007+
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/omit-if-no-ref/ eth_mii_txd3_pb8: eth_mii_txd3_pb8 {
1009+
pinmux = <STM32_PINMUX('B', 8, AF11)>;
1010+
slew-rate = "very-high-speed";
1011+
};
1012+
1013+
/omit-if-no-ref/ eth_mii_rx_er_pb10: eth_mii_rx_er_pb10 {
1014+
pinmux = <STM32_PINMUX('B', 10, AF11)>;
1015+
slew-rate = "very-high-speed";
1016+
};
1017+
1018+
/omit-if-no-ref/ eth_mii_tx_en_pb11: eth_mii_tx_en_pb11 {
1019+
pinmux = <STM32_PINMUX('B', 11, AF11)>;
1020+
slew-rate = "very-high-speed";
1021+
};
1022+
1023+
/omit-if-no-ref/ eth_mii_rxd3_pb13: eth_mii_rxd3_pb13 {
1024+
pinmux = <STM32_PINMUX('B', 13, AF11)>;
1025+
slew-rate = "very-high-speed";
1026+
};
1027+
1028+
/omit-if-no-ref/ eth_mii_txd2_pc2: eth_mii_txd2_pc2 {
1029+
pinmux = <STM32_PINMUX('C', 2, AF11)>;
1030+
slew-rate = "very-high-speed";
1031+
};
1032+
1033+
/omit-if-no-ref/ eth_mii_tx_clk_pc3: eth_mii_tx_clk_pc3 {
1034+
pinmux = <STM32_PINMUX('C', 3, AF11)>;
1035+
slew-rate = "very-high-speed";
1036+
};
1037+
1038+
/omit-if-no-ref/ eth_mii_rxd0_pc4: eth_mii_rxd0_pc4 {
1039+
pinmux = <STM32_PINMUX('C', 4, AF11)>;
1040+
slew-rate = "very-high-speed";
1041+
};
1042+
1043+
/omit-if-no-ref/ eth_mii_rxd1_pc5: eth_mii_rxd1_pc5 {
1044+
pinmux = <STM32_PINMUX('C', 5, AF11)>;
1045+
slew-rate = "very-high-speed";
1046+
};
1047+
1048+
/omit-if-no-ref/ eth_mii_rx_clk_pd7: eth_mii_rx_clk_pd7 {
1049+
pinmux = <STM32_PINMUX('D', 7, AF4)>;
1050+
slew-rate = "very-high-speed";
1051+
};
1052+
1053+
/omit-if-no-ref/ eth_mii_tx_en_pd8: eth_mii_tx_en_pd8 {
1054+
pinmux = <STM32_PINMUX('D', 8, AF11)>;
1055+
slew-rate = "very-high-speed";
1056+
};
1057+
1058+
/omit-if-no-ref/ eth_mii_txd3_pe2: eth_mii_txd3_pe2 {
1059+
pinmux = <STM32_PINMUX('E', 2, AF11)>;
1060+
slew-rate = "very-high-speed";
1061+
};
1062+
1063+
/omit-if-no-ref/ eth_mii_rxd3_pe3: eth_mii_rxd3_pe3 {
1064+
pinmux = <STM32_PINMUX('E', 3, AF11)>;
1065+
slew-rate = "very-high-speed";
1066+
};
1067+
1068+
/omit-if-no-ref/ eth_mii_crs_pf3: eth_mii_crs_pf3 {
1069+
pinmux = <STM32_PINMUX('F', 3, AF11)>;
1070+
slew-rate = "very-high-speed";
1071+
};
1072+
1073+
/omit-if-no-ref/ eth_mii_rxd2_pf5: eth_mii_rxd2_pf5 {
1074+
pinmux = <STM32_PINMUX('F', 5, AF11)>;
1075+
slew-rate = "very-high-speed";
1076+
};
1077+
1078+
/* ETH_RMII */
1079+
1080+
/omit-if-no-ref/ eth_rmii_ref_clk_pa1: eth_rmii_ref_clk_pa1 {
1081+
pinmux = <STM32_PINMUX('A', 1, AF11)>;
1082+
slew-rate = "very-high-speed";
1083+
};
1084+
1085+
/omit-if-no-ref/ eth_rmii_crs_dv_pa7: eth_rmii_crs_dv_pa7 {
1086+
pinmux = <STM32_PINMUX('A', 7, AF11)>;
1087+
slew-rate = "very-high-speed";
1088+
};
1089+
1090+
/omit-if-no-ref/ eth_rmii_txd0_pb0: eth_rmii_txd0_pb0 {
1091+
pinmux = <STM32_PINMUX('B', 0, AF11)>;
1092+
slew-rate = "very-high-speed";
1093+
};
1094+
1095+
/omit-if-no-ref/ eth_rmii_txd1_pb1: eth_rmii_txd1_pb1 {
1096+
pinmux = <STM32_PINMUX('B', 1, AF11)>;
1097+
slew-rate = "very-high-speed";
1098+
};
1099+
1100+
/omit-if-no-ref/ eth_rmii_ref_clk_pb6: eth_rmii_ref_clk_pb6 {
1101+
pinmux = <STM32_PINMUX('B', 6, AF11)>;
1102+
slew-rate = "very-high-speed";
1103+
};
1104+
1105+
/omit-if-no-ref/ eth_rmii_txd1_pb7: eth_rmii_txd1_pb7 {
1106+
pinmux = <STM32_PINMUX('B', 7, AF11)>;
1107+
slew-rate = "very-high-speed";
1108+
};
1109+
1110+
/omit-if-no-ref/ eth_rmii_tx_en_pb11: eth_rmii_tx_en_pb11 {
1111+
pinmux = <STM32_PINMUX('B', 11, AF11)>;
1112+
slew-rate = "very-high-speed";
1113+
};
1114+
1115+
/omit-if-no-ref/ eth_rmii_rxd0_pc4: eth_rmii_rxd0_pc4 {
1116+
pinmux = <STM32_PINMUX('C', 4, AF11)>;
1117+
slew-rate = "very-high-speed";
1118+
};
1119+
1120+
/omit-if-no-ref/ eth_rmii_rxd1_pc5: eth_rmii_rxd1_pc5 {
1121+
pinmux = <STM32_PINMUX('C', 5, AF11)>;
1122+
slew-rate = "very-high-speed";
1123+
};
1124+
1125+
/omit-if-no-ref/ eth_rmii_ref_clk_pd7: eth_rmii_ref_clk_pd7 {
1126+
pinmux = <STM32_PINMUX('D', 7, AF4)>;
1127+
slew-rate = "very-high-speed";
1128+
};
1129+
1130+
/omit-if-no-ref/ eth_rmii_tx_en_pd8: eth_rmii_tx_en_pd8 {
1131+
pinmux = <STM32_PINMUX('D', 8, AF11)>;
1132+
slew-rate = "very-high-speed";
1133+
};
1134+
9711135
/* FDCAN_RX */
9721136

9731137
/omit-if-no-ref/ fdcan1_rx_pa11: fdcan1_rx_pa11 {

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