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Add OpenRISC 1000 (or1k) support
Signed-off-by: Joel Holdsworth <[email protected]>
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.github/workflows/ci.yml

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@@ -48,6 +48,7 @@ on:
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- arm-zephyr-eabi
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- microblazeel-zephyr-elf
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- mips-zephyr-elf
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- or1k-zephyr-elf
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- riscv64-zephyr-elf
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- rx-zephyr-elf
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- sparc-zephyr-elf
@@ -176,6 +177,7 @@ jobs:
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arm-zephyr-eabi) build_target_arm_zephyr_eabi="y";;
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microblazeel-zephyr-elf) build_target_microblazeel_zephyr_elf="y";;
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mips-zephyr-elf) build_target_mips_zephyr_elf="y";;
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or1k-zephyr-elf) build_target_or1k_zephyr_elf="y";;
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riscv64-zephyr-elf) build_target_riscv64_zephyr_elf="y";;
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rx-zephyr-elf) build_target_rx_zephyr_elf="y";;
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sparc-zephyr-elf) build_target_sparc_zephyr_elf="y";;
@@ -228,6 +230,7 @@ jobs:
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build_target_arm_zephyr_eabi="y"
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build_target_microblazeel_zephyr_elf="y"
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build_target_mips_zephyr_elf="y"
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build_target_or1k_zephyr_elf="y"
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build_target_riscv64_zephyr_elf="y"
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build_target_rx_zephyr_elf="y"
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build_target_sparc_zephyr_elf="y"
@@ -320,6 +323,7 @@ jobs:
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[ "${build_target_arm_zephyr_eabi}" == "y" ] && MATRIX_TARGETS+='"arm-zephyr-eabi",'
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[ "${build_target_microblazeel_zephyr_elf}" == "y" ] && MATRIX_TARGETS+='"microblazeel-zephyr-elf",'
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[ "${build_target_mips_zephyr_elf}" == "y" ] && MATRIX_TARGETS+='"mips-zephyr-elf",'
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[ "${build_target_or1k_zephyr_elf}" == "y" ] && MATRIX_TARGETS+='"or1k-zephyr-elf",'
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[ "${build_target_riscv64_zephyr_elf}" == "y" ] && MATRIX_TARGETS+='"riscv64-zephyr-elf",'
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[ "${build_target_rx_zephyr_elf}" == "y" ] && MATRIX_TARGETS+='"rx-zephyr-elf",'
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[ "${build_target_sparc_zephyr_elf}" == "y" ] && MATRIX_TARGETS+='"sparc-zephyr-elf",'
@@ -1827,6 +1831,10 @@ jobs:
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mips-zephyr-elf)
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PLATFORM_ARGS+="-p qemu_malta "
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;;
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or1k-zephyr-elf)
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# TODO: Enable qemu_or1k when zephyrproject-rtos/zephyr#98160 is merged
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# PLATFORM_ARGS+="-p qemu_or1k "
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;;
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riscv64-zephyr-elf)
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PLATFORM_ARGS+="-p qemu_riscv32 "
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PLATFORM_ARGS+="-p qemu_riscv32e "

README.md

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@@ -11,6 +11,7 @@ The toolchains for the following target architectures are supported:
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- Microblaze (32-bit)
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- MIPS (32-bit and 64-bit)
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- Nios II
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- OpenRISC 1000
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- RISC-V (32-bit and 64-bit; RV32I, RV32E, RV64I)
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- RX
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- SPARC (32-bit and 64-bit; SPARC V8, SPARC V9)

cmake/zephyr/gnu/target.cmake

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@@ -11,6 +11,7 @@ set(CROSS_COMPILE_TARGET_riscv riscv64-zephyr-elf)
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set(CROSS_COMPILE_TARGET_mips mips-zephyr-elf)
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set(CROSS_COMPILE_TARGET_rx rx-zephyr-elf)
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set(CROSS_COMPILE_TARGET_microblaze microblazeel-zephyr-elf)
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set(CROSS_COMPILE_TARGET_or1k or1k-zephyr-elf)
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set(CROSS_COMPILE_TARGET_xtensa xtensa-${SOC_TOOLCHAIN_NAME}_zephyr-elf)
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# ARC uses the same source tree for both ARCv2 & ARCv3 architectures,

configs/or1k-zephyr-elf.config

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CT_CONFIG_VERSION="3"
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CT_EXPERIMENTAL=y
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CT_ARCH_OPENRISC=y
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CT_TARGET_CFLAGS="-ftls-model=local-exec"
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CT_TARGET_VENDOR="zephyr"
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CT_MULTILIB=n
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CT_MULTILIB_SPACE=n
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CT_MULTILIB_ANY=n
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CT_DEMULTILIB=y

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