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plat: renesas: Add support for RZ/A series
Add support for Renesas RZ/A series Signed-off-by: Nhut Nguyen <[email protected]>
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‎plat/renesas/rz/board/a3m_ek_nor/rz_board.mk‎

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#
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# Copyright (c) 2024, Renesas Electronics Corporation. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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XSPI0_DEVICE?=qspiflash_mx25l25645g
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XSPI_DEVICE_TYPE:=QSPI
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NAND:=0
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RZ_FLASH_SIZE ?= 33554432 # 32MB
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$(eval $(call add_define,RZ_FLASH_SIZE))
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ifneq (${USE_SDRAM},0)
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ifeq (${DDR_PLL4},1333)
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DDR_SOURCES += plat/renesas/rz/soc/${PLAT}/drivers/ddr/param_mc_C-011_D3-02-1.c \
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plat/renesas/rz/common/drivers/ddr/param_swizzle_T1.c
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else
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DDR_PLL4 := 1600
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DDR_SOURCES += plat/renesas/rz/soc/${PLAT}/drivers/ddr/param_mc_C-011_D3-01-1.c \
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plat/renesas/rz/common/drivers/ddr/param_swizzle_T1.c
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endif
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$(eval $(call add_define,DDR_PLL4))
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endif
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$(eval $(call add_define_val,XSPI_DEVICE_TYPE,\"${XSPI_DEVICE_TYPE}\"))

‎plat/renesas/rz/board/a3ul_smarc_octal/rz_board.mk‎

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#
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# Copyright (c) 2021, Renesas Electronics Corporation. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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XSPI1_DEVICE?=octaflash_mx66uw
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XSPI1_IF_OPTION?=.device_size=128*1024*1024
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XSPI2_DEVICE?=octaram_apsxx
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XSPI2_IF_OPTION?=.device_size=64*1024*1024
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XSPI_DEVICE_TYPE:=OCTA
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NAND:=0
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RZ_FLASH_SIZE ?= 134217728 # 128MB
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$(eval $(call add_define,RZ_FLASH_SIZE))
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ifneq (${USE_SDRAM},0)
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DDR_SOURCES += plat/renesas/rz/soc/${PLAT}/drivers/ddr/param_mc_C-011_D4-01-2.c \
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plat/renesas/rz/common/drivers/ddr/param_swizzle_T3bcud2.c
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DDR_PLL4 := 1600
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$(eval $(call add_define,DDR_PLL4))
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endif
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$(eval $(call add_define_val,XSPI_DEVICE_TYPE,\"${XSPI_DEVICE_TYPE}\"))

‎plat/renesas/rz/board/a3ul_smarc_qspi/rz_board.mk‎

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#
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# Copyright (c) 2021, Renesas Electronics Corporation. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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XSPI0_DEVICE?=qspiflash_at25
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XSPI_DEVICE_TYPE:=QSPI
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NAND:=0
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RZ_FLASH_SIZE ?= 16777216 # 16MB
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$(eval $(call add_define,RZ_FLASH_SIZE))
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ifneq (${USE_SDRAM},0)
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DDR_SOURCES += plat/renesas/rz/soc/${PLAT}/drivers/ddr/param_mc_C-011_D4-01-2.c \
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plat/renesas/rz/common/drivers/ddr/param_swizzle_T3bcud2.c
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DDR_PLL4 := 1600
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$(eval $(call add_define,DDR_PLL4))
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endif
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$(eval $(call add_define_val,XSPI_DEVICE_TYPE,\"${XSPI_DEVICE_TYPE}\"))

‎plat/renesas/rz/common/aarch64/plat_helpers.S‎

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/*
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* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2020, Renesas Electronics Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <asm_macros.S>
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.globl platform_mem_init
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.globl plat_my_core_pos
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.globl plat_crash_console_init
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.globl plat_crash_console_putc
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.globl plat_crash_console_flush
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func platform_mem_init
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ret
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endfunc platform_mem_init
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func plat_my_core_pos
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mrs x0, mpidr_el1
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lsr x0, x0, #MPIDR_AFF1_SHIFT
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and x0, x0, #MPIDR_CPU_MASK
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ret
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endfunc plat_my_core_pos
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func plat_crash_console_init
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mov x0, #1
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ret
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endfunc plat_crash_console_init
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func plat_crash_console_putc
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ret
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endfunc plat_crash_console_putc
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func plat_crash_console_flush
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mov x0, #0
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ret
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endfunc plat_crash_console_flush

‎plat/renesas/rz/common/bl2_plat_mem_params_desc.c‎

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/*
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* Copyright (c) 2020, Renesas Electronics Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <common/desc_image_load.h>
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#include <plat/common/platform.h>
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#include <rzg2l_def.h>
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#if (RZG2L_BL33_EXECUTION_EL == 0)
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#define BL33_MODE MODE_EL1
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#else
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#define BL33_MODE MODE_EL2
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#endif
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static bl_mem_params_node_t bl2_mem_params_descs[] = {
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#if (APPLOAD == RZ_NOFIP)
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{
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.image_id = MAX_IMAGE_IDS,
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SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, VERSION_2,
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entry_point_info_t, SECURE | EXECUTABLE | EP_FIRST_EXE),
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.ep_info.spsr = SPSR_64(MODE_EL3,
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MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS),
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.ep_info.pc = BSP_BASE,
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.ep_info.args.arg0 = (uintptr_t)PARAMS_BASE,
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SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, VERSION_2,
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image_info_t, IMAGE_ATTRIB_PLAT_SETUP | IMAGE_ATTRIB_SKIP_LOADING),
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.next_handoff_image_id = INVALID_IMAGE_ID,
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}
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#else
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{
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#if RZA3
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.image_id = BL31_IMAGE_ID,
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SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, VERSION_2,
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entry_point_info_t, SECURE | EXECUTABLE | EP_FIRST_EXE),
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.ep_info.spsr = SPSR_64(MODE_EL3,
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MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS),
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.ep_info.pc = BSP_BASE,
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.ep_info.args.arg0 = (uintptr_t)PARAMS_BASE,
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SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, VERSION_2,
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image_info_t, IMAGE_ATTRIB_PLAT_SETUP | IMAGE_ATTRIB_SKIP_LOADING),
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.image_info.image_max_size = BSP_LIMIT - BSP_BASE,
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.image_info.image_base = BSP_BASE,
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.next_handoff_image_id = INVALID_IMAGE_ID,
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#else
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.image_id = BL31_IMAGE_ID,
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SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, VERSION_2,
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entry_point_info_t, SECURE | EXECUTABLE | EP_FIRST_EXE),
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.ep_info.spsr = SPSR_64(MODE_EL3,
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MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS),
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.ep_info.pc = BL31_BASE,
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.ep_info.args.arg0 = (uintptr_t)PARAMS_BASE,
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SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, VERSION_2,
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image_info_t, IMAGE_ATTRIB_PLAT_SETUP),
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.image_info.image_max_size = BL31_LIMIT - BL31_BASE,
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.image_info.image_base = BL31_BASE,
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# ifdef BL32_BASE
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.next_handoff_image_id = BL32_IMAGE_ID,
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# else
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.next_handoff_image_id = BL33_IMAGE_ID,
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# endif /* BL32_BASE */
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},
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# ifdef BL32_BASE
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{
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.image_id = BL32_IMAGE_ID,
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SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, VERSION_2,
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entry_point_info_t, SECURE | EXECUTABLE),
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.ep_info.pc = BL32_BASE,
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.ep_info.spsr = 0,
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SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, VERSION_2,
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image_info_t, 0),
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.image_info.image_max_size = BL32_LIMIT - BL32_BASE,
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.image_info.image_base = BL32_BASE,
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.next_handoff_image_id = BL33_IMAGE_ID,
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},
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# endif /* BL32_BASE */
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{
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.image_id = BL33_IMAGE_ID,
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SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP, VERSION_2,
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entry_point_info_t, NON_SECURE | EXECUTABLE),
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.ep_info.spsr = SPSR_64(BL33_MODE, MODE_SP_ELX,
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DISABLE_ALL_EXCEPTIONS),
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.ep_info.pc = BL33_BASE,
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SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, VERSION_2,
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image_info_t, 0),
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.image_info.image_max_size =
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(uint32_t) (BL33_LIMIT - BL33_BASE),
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.image_info.image_base = BL33_BASE,
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.next_handoff_image_id = INVALID_IMAGE_ID,
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#endif /* RZA3 */
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}
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#endif /* (APPLOAD == RZ_NOFIP) */
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};
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REGISTER_BL_IMAGE_DESCS(bl2_mem_params_descs)

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