@@ -28,24 +28,39 @@ description: |
2828
2929 Specifying a gated clock:
3030
31- To specify a gated clock, a peripheral should define a "clocks" property encoded
32- in the following way:
31+ To specify a gated clock, a peripheral should define a "clocks" property such as:
3332 ... {
3433 ...
35- clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000020 >;
34+ clocks = <&rcc STM32_CLOCK(APB2, 5) >;
3635 ...
3736 }
38- After the phandle referring to rcc node, the first index specifies the registers of
39- the bus controlling the peripheral and the second index specifies the bit used to
40- control the peripheral clock in that bus register.
37+
38+ After the phandle referring to rcc node, use the STM32_CLOCK() macro which accepts
39+ two parameters: the first specifies the bus on which the peripheral is attached, and
40+ the second indicates the bit number controlling the peripheral clock gate in that
41+ bus's control register in RCC. As an example, the snippet above indicates that the
42+ peripheral gate is controlled by bit 5 in RCC_APB2ENR (USART6EN on STM32F401).
43+ The gated clock is required when accessing to the peripheral controller is needed
44+ (generally for configuring the device). If dual clock domain is not used, it is
45+ also used for peripheral operation.
46+
47+ Note: in situations where more than one bit is required, use the explicit form:
48+ ... {
49+ ...
50+ clocks = <&rcc STM32_CLOCK_BUS_APB2 ((1 << 14) | (1 << 7))>;
51+ ...
52+ }
53+ where 14 and 7 are the bits that control the peripheral clock gate.
54+ (You can have more than two bits, and they do not have to be contiguous).
55+
4156
4257 Specifying an alternate clock source:
4358
4459 Specifying an alternate source clock could be done by adding a clock specifier to the
4560 clock property:
4661 ... {
4762 ...
48- clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000020 >,
63+ clocks = <&rcc STM32_CLOCK(APB2, 5) >,
4964 <&rcc STM32_SRC_HSI I2C1_SEL(2)>;
5065 ...
5166 }
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