drivers: misc: add NXP i.MX93 Video PLL driver support

Added nxp_imx93_video_pll driver to support display function

Signed-off-by: Ruoshan Shi <[email protected]>

Author: RuoshanShi

drivers/misc/CMakeLists.txt

@@ -5,6 +5,7 @@ add_subdirectory_ifdef(CONFIG_FT800 ft8xx)
 add_subdirectory_ifdef(CONFIG_GROVE_LCD_RGB grove_lcd_rgb)
 add_subdirectory_ifdef(CONFIG_PIO_RPI_PICO pio_rpi_pico)
 add_subdirectory_ifdef(CONFIG_NXP_FLEXRAM nxp_flexram)
+add_subdirectory_ifdef(CONFIG_NXP_IMX93_VIDEO_PLL nxp_imx93_video_pll)
 add_subdirectory_ifdef(CONFIG_NXP_MEDIAMIX_BLK_CTRL nxp_imx93_mediamix)
 add_subdirectory_ifdef(CONFIG_NXP_S32_EMIOS nxp_s32_emios)
 add_subdirectory_ifdef(CONFIG_TIMEAWARE_GPIO timeaware_gpio)

drivers/misc/Kconfig

@@ -23,5 +23,6 @@ source "drivers/misc/nxp_rtxxx_dsp_ctrl/Kconfig"
 source "drivers/misc/stm32n6_axisram/Kconfig"
 source "drivers/misc/nxp_inputmux/Kconfig"
 source "drivers/misc/nxp_imx93_mediamix/Kconfig"
+source "drivers/misc/nxp_imx93_video_pll/Kconfig"
 
 endmenu

drivers/misc/nxp_imx93_video_pll/CMakeLists.txt

@@ -0,0 +1,6 @@
+# Copyright 2025 NXP
+# SPDX-License-Identifier: Apache-2.0
+
+zephyr_library()
+
+zephyr_library_sources(nxp_video_pll_ctrl.c)

drivers/misc/nxp_imx93_video_pll/Kconfig

@@ -0,0 +1,20 @@
+# Copyright 2025 NXP
+# SPDX-License-Identifier: Apache-2.0
+
+config NXP_IMX93_VIDEO_PLL
+	bool "Initialize NXP iMX93 VIDEO PLL"
+	default y
+	help
+	  Enable initialization of VIDEO PLL using device tree configuration.
+
+if NXP_IMX93_VIDEO_PLL
+
+module = VIDEO_PLL
+module-str = video pll
+source "subsys/logging/Kconfig.template.log_config"
+
+config IMX93_VIDEO_PLL_INIT_PRIORITY
+	int "i.MX93 video pll initialization priority"
+	default 30
+
+endif # NXP_IMX93_VIDEO_PLL

drivers/misc/nxp_imx93_video_pll/nxp_video_pll_ctrl.c

@@ -0,0 +1,52 @@
+/*
+ * Copyright 2025 NXP
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#define DT_DRV_COMPAT nxp_imx93_video_pll
+#include <zephyr/device.h>
+#include <zephyr/init.h>
+#include <zephyr/kernel.h>
+#include <zephyr/logging/log.h>
+LOG_MODULE_REGISTER(video_pll, CONFIG_MEDIAMIX_LOG_LEVEL);
+#include <fsl_common.h>
+
+struct video_pll_config {
+	uint32_t rdiv;
+	uint32_t mfi;
+	uint32_t mfn;
+	uint32_t mfd;
+	uint32_t odiv;
+	uint32_t freq;
+};
+
+#define VIDEO_PLL_INIT(inst)                                                                       \
+	static int video_pll_init_##inst(const struct device *dev)                                 \
+	{                                                                                          \
+		const struct video_pll_config *cfg = dev->config;                                  \
+		const fracn_pll_init_t pll_cfg = {                                                 \
+			.rdiv = cfg->rdiv,                                                         \
+			.mfi = cfg->mfi,                                                           \
+			.mfn = cfg->mfn,                                                           \
+			.mfd = cfg->mfd,                                                           \
+			.odiv = cfg->odiv,                                                         \
+		};                                                                                 \
+		CLOCK_PllInit(VIDEOPLL, &pll_cfg);                                                 \
+		g_clockSourceFreq[kCLOCK_VideoPll1] = cfg->freq;                                   \
+		g_clockSourceFreq[kCLOCK_VideoPll1Out] = cfg->freq;                                \
+		printk("Initialized VIDEO PLL to %d Hz\n", cfg->freq);                             \
+		return 0;                                                                          \
+	};                                                                                         \
+	static const struct video_pll_config video_pll_cfg_##inst = {                              \
+		.rdiv = DT_INST_PROP(inst, rdiv),                                                  \
+		.mfi = DT_INST_PROP(inst, mfi),                                                    \
+		.mfn = DT_INST_PROP(inst, mfn),                                                    \
+		.mfd = DT_INST_PROP(inst, mfd),                                                    \
+		.odiv = DT_INST_PROP(inst, odiv),                                                  \
+		.freq = DT_INST_PROP(inst, pll_frequency),                                         \
+	};                                                                                         \
+	DEVICE_DT_INST_DEFINE(inst, video_pll_init_##inst, NULL, NULL, &video_pll_cfg_##inst,      \
+			      PRE_KERNEL_1, CONFIG_IMX93_VIDEO_PLL_INIT_PRIORITY, NULL);
+
+DT_INST_FOREACH_STATUS_OKAY(VIDEO_PLL_INIT)

dts/bindings/misc/nxp,imx93-video-pll.yaml

@@ -0,0 +1,42 @@
+#
+# Copyright 2025 NXP
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+description: NXP i.MX93 Video PLL controller
+
+compatible: "nxp,imx93-video-pll"
+
+include: base.yaml
+
+properties:
+  rdiv:
+    type: int
+    required: true
+    description: Reference divider value.
+
+  mfi:
+    type: int
+    required: true
+    description: Integer multiplier factor.
+
+  mfn:
+    type: int
+    required: true
+    description: Fractional numerator.
+
+  mfd:
+    type: int
+    required: true
+    description: Fractional denominator.
+
+  odiv:
+    type: int
+    required: true
+    description: Output divider value.
+
+  pll-frequency:
+    type: int
+    required: true
+    description: Target PLL output frequency in Hz.