Skip to content

Commit 1782cc3

Browse files
committed
drivers: spi: nxp_lpspi: Use spi_config timing params
Use the timing params from spi_config that are specific to the slave instead of using the same timing for the controller for all slaves. Remove these properties from the LPSPI DT binding. Signed-off-by: Declan Snyder <[email protected]>
1 parent 8e36c80 commit 1782cc3

File tree

3 files changed

+15
-33
lines changed

3 files changed

+15
-33
lines changed

drivers/spi/spi_nxp_lpspi/spi_nxp_lpspi_common.c

Lines changed: 15 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -149,16 +149,22 @@ static uint8_t lpspi_calc_delay_scaler(uint32_t desired_delay_ns,
149149
}
150150

151151
/* returns CCR mask of the bits 8-31 */
152-
static inline uint32_t lpspi_set_delays(const struct device *dev, uint32_t prescaled_clock)
152+
static inline uint32_t lpspi_set_delays(const struct spi_config *spi_cfg,
153+
uint32_t prescaled_clock)
153154
{
154-
const struct lpspi_config *config = dev->config;
155+
uint32_t val = 0;
156+
157+
if (!spi_cs_is_gpio(spi_cfg)) {
158+
val |= LPSPI_CCR_PCSSCK(lpspi_calc_delay_scaler(spi_cfg->cs.lead,
159+
prescaled_clock, 1)) |
160+
LPSPI_CCR_SCKPCS(lpspi_calc_delay_scaler(spi_cfg->cs.lag,
161+
prescaled_clock, 1));
162+
}
163+
164+
val |= LPSPI_CCR_DBT(lpspi_calc_delay_scaler(spi_get_word_delay(spi_cfg),
165+
prescaled_clock, 2));
155166

156-
return LPSPI_CCR_PCSSCK(lpspi_calc_delay_scaler(config->pcs_sck_delay,
157-
prescaled_clock, 1)) |
158-
LPSPI_CCR_SCKPCS(lpspi_calc_delay_scaler(config->sck_pcs_delay,
159-
prescaled_clock, 1)) |
160-
LPSPI_CCR_DBT(lpspi_calc_delay_scaler(config->transfer_delay,
161-
prescaled_clock, 2));
167+
return val;
162168
}
163169

164170
/* This is the equation for the sck frequency given a div and prescaler. */
@@ -315,7 +321,7 @@ int lpspi_configure(const struct device *dev, const struct spi_config *spi_cfg)
315321

316322
/* sckdiv algorithm must run *before* delays are set in order to know prescaler */
317323
ccr |= lpspi_set_sckdiv(spi_cfg->frequency, clock_freq, &prescaler);
318-
ccr |= lpspi_set_delays(dev, clock_freq / TWO_EXP(prescaler));
324+
ccr |= lpspi_set_delays(spi_cfg, clock_freq / TWO_EXP(prescaler));
319325

320326
/* note that not all bits of the register are readable on some platform,
321327
* that's why we update it on one write

drivers/spi/spi_nxp_lpspi/spi_nxp_lpspi_priv.h

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -97,9 +97,6 @@ int lpspi_wait_tx_fifo_empty(const struct device *dev);
9797
.clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(n)), \
9898
.clock_subsys = (clock_control_subsys_t)DT_INST_CLOCKS_CELL(n, name), \
9999
.irq_config_func = lpspi_config_func_##n, \
100-
.pcs_sck_delay = DT_INST_PROP_OR(n, pcs_sck_delay, 0), \
101-
.sck_pcs_delay = DT_INST_PROP_OR(n, sck_pcs_delay, 0), \
102-
.transfer_delay = DT_INST_PROP_OR(n, transfer_delay, 0), \
103100
.pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
104101
.data_pin_config = (uint8_t)DT_INST_ENUM_IDX(n, data_pin_config), \
105102
.tristate_output = DT_INST_PROP(n, tristate_output), \

dts/bindings/spi/nxp,lpspi.yaml

Lines changed: 0 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -14,27 +14,6 @@ properties:
1414
clocks:
1515
required: true
1616

17-
pcs-sck-delay:
18-
type: int
19-
description: |
20-
Delay in nanoseconds from the chip select assert to the first clock
21-
edge.
22-
If not set, the minimum supported delay is used.
23-
24-
sck-pcs-delay:
25-
type: int
26-
description: |
27-
Delay in nanoseconds from the last clock edge to the chip select
28-
deassert.
29-
If not set, the minimum supported delay is used.
30-
31-
transfer-delay:
32-
type: int
33-
description: |
34-
Delay in nanoseconds between last SCK edge of a transfer word and the
35-
first SCK edge of the next transfer word.
36-
If not set, the minimum supported delay is used.
37-
3817
data-pin-config:
3918
type: string
4019
enum:

0 commit comments

Comments
 (0)