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dts: bindings: dac: define silabs,vdac bindings
Defines bindings that are compatible with Silabs VDAC. Reference your part's design book when configuring values for the properties. Signed-off-by: Bastien Beauchamp <[email protected]>
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dts/bindings/dac/silabs,vdac.yaml

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# Copyright (c) 2025 Silicon Laboratories Inc.
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# SPDX-License-Identifier: Apache-2.0
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description: |
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Silabs VDAC (Voltage Digital-to-Analog Converter)
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The VDAC has two channels, a resolution of 12-bit and a configurable output
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range from 0V to 2.5V.
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The minimal default configuration for the Silabs VDAC node is as follows:
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&vdac0 {
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status = "okay";
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voltage-reference = "2.5V";
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channel0 {
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main-output;
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aux-output-port = "None";
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aux-output-pin = <0>;
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};
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};
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Using the main output is the preferred way for any DAC output. Defines like
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`VDAC0_CH0_MAIN_OUT_PIN` exists in em_device.h to get the dedicated pin for
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your device.
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It is also possible to use the auxiliary output to route the output to other
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peripherals like the IADC or the ACMP, or to the analog bus to output on any GPIO.
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Note that the analog bus multiplexer adds significant impedance, and this option
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may not be suitable for certain loads or dynamic conditions.
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To connect the analog bus to a GPIO, the `pinctrl` driver must be configured to
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allocate an analog bus corresponding to the port and pin of each GPIO input selected.
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The following is an example of how that can be configured:
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#include <zephyr/dt-bindings/pinctrl/silabs/xg24-pinctrl.h>
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&pinctrl {
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vdac0_default: vdac0_default {
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group0 {
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silabs,analog-bus = <ABUS_CDODD0_VDAC0CH0>;
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};
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group1 {
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silabs,analog-bus = <ABUS_CDEVEN1_VDAC0CH1>;
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};
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};
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&vdac0 {
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pinctrl-0 = <&vdac0_default>;
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pinctrl-names = "default";
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status = "okay";
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voltage-reference = "1.25V";
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channel0 {
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aux-output;
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aux-output-port = "Port C";
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aux-output-pin = <1>;
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low-power-mode;
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};
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channel1 {
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aux-output;
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aux-output-port = "Port C";
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aux-output-pin = <2>;
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low-power-mode;
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};
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};
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In the above example, note that the device specific bindings for pinctrl
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were included. This header defines the set of analog bus allocations possible
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for xg24 parts, and similar headers exist for other parts.
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compatible: "silabs,vdac"
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include:
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- dac-controller.yaml
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- pinctrl-device.yaml
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properties:
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voltage-reference:
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description: |
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Reference voltage to use.
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type: string
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enum:
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- "1.25V"
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- "2.5V"
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- "AVDD"
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- "VREFP"
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required: yes
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warmup-cycles:
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description: |
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Number of prescaled CLK_VDAC + 1 for the DAC to warmup.
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This determines how many clock cycles are needed for the DAC to stabilize
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before it can be used for conversions.
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The default corresponds to the reset value of the register field.
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type: int
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default: 0
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refresh-period-cycles:
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description: |
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Channel refresh period configuration.
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Determines how often the DAC channels are refreshed to maintain accuracy.
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The default corresponds to the reset value of the register field.
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type: int
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enum: [2, 4, 8, 16, 32, 64, 128, 256]
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default: 2
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"#io-channel-cells":
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const: 1
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io-channel-cells:
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- output
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child-binding:
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description: |
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Channel configuration.
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properties:
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main-output:
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description: |
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Connects the channel to the dedicated output pin.
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type: boolean
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aux-output:
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description: |
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Connects the low-power channel to the auxiliary outputs.
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type: boolean
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short-output:
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description: |
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Short-circuits the main and auxiliary outputs.
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Set to use high-power mode with auxiliary outputs.
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type: boolean
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aux-output-port:
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description: |
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Connects the channel to the specified output port on the analog bus.
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Set to "None" if the auxiliary outputs are used.
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type: string
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enum:
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- "None"
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- "Port A"
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- "Port B"
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- "Port C"
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- "Port D"
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required: true
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aux-output-pin:
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description: |
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Connects the channel to the specified output pin.
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type: int
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required: true
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low-power-mode:
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description: |
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Sets the output power mode to low instead of high.
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type: boolean
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high-capacitance-load:
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description: |
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Enables high-capacitance load mode for the DAC channel.
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Only usable without low-power-mode.
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type: boolean
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sample-off-mode:
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description: |
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Enables sample-off mode for the DAC channel.
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If enabled, the output is only driven for a limited time per conversion.
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type: boolean
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output-hold-cycles:
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description: |
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Time in ADC clock cycles that the output is held for the DAC channel.
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Only usable with sample-off-mode.
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The default corresponds to the reset value of the register field.
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type: int
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default: 0
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refresh-timer:
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description: |
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Enables the refresh timer.
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type: boolean

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