bindings: sercom_g1_uart: microchip: uart bindings for sercom g1 IPs

Add minimal set of binding parameters for sercom uart driver.

Signed-off-by: Sunil Abraham <[email protected]>

Author: sunil-abraham

dts/arm/microchip/sam/sam_d5x_e5x/common/samd5xe5x.dtsi

@@ -53,6 +53,26 @@
 			};
 		};
 
+		sercom0: sercom@40003000 {
+			compatible = "microchip,sercom-g1";
+			status = "disabled";
+			reg = <0x40003000 0x31>;
+			interrupts = <46 0>, <47 0>, <48 0>, <49 0>;
+			clocks = <&mclkperiph CLOCK_MCHP_MCLKPERIPH_ID_APBA_SERCOM0>,
+					<&gclkperiph CLOCK_MCHP_GCLKPERIPH_ID_SERCOM0_CORE>;
+			clock-names = "mclk", "gclk";
+		};
+
+		sercom1: sercom@40003400 {
+			compatible = "microchip,sercom-g1";
+			status = "disabled";
+			reg = <0x40003400 0x31>;
+			interrupts = <50 0>, <51 0>, <52 0>, <53 0>;
+			clocks = <&mclkperiph CLOCK_MCHP_MCLKPERIPH_ID_APBA_SERCOM1>,
+					<&gclkperiph CLOCK_MCHP_GCLKPERIPH_ID_SERCOM1_CORE>;
+			clock-names = "mclk", "gclk";
+		};
+
 		nvmctrl: nvmctrl@41004000 {
 			compatible = "microchip,nvmctrl-g1";
 			status = "disabled";
@@ -88,6 +108,46 @@
 				reg = <0x41008180 0x80>;
 			};
 		};
+
+		sercom2: sercom@41012000 {
+			compatible = "microchip,sercom-g1";
+			status = "disabled";
+			reg = <0x41012000 0x31>;
+			interrupts = <54 0>, <55 0>, <56 0>, <57 0>;
+			clocks = <&mclkperiph CLOCK_MCHP_MCLKPERIPH_ID_APBB_SERCOM2>,
+					<&gclkperiph CLOCK_MCHP_GCLKPERIPH_ID_SERCOM2_CORE>;
+			clock-names = "mclk", "gclk";
+		};
+
+		sercom3: sercom@41014000 {
+			compatible = "microchip,sercom-g1";
+			status = "disabled";
+			reg = <0x41014000 0x31>;
+			interrupts = <58 0>, <59 0>, <60 0>, <61 0>;
+			clocks = <&mclkperiph CLOCK_MCHP_MCLKPERIPH_ID_APBB_SERCOM3>,
+					<&gclkperiph CLOCK_MCHP_GCLKPERIPH_ID_SERCOM3_CORE>;
+			clock-names = "mclk", "gclk";
+		};
+
+		sercom4: sercom@43000000 {
+			compatible = "microchip,sercom-g1";
+			status = "disabled";
+			reg = <0x43000000 0x31>;
+			interrupts = <62 0>, <63 0>, <64 0>, <65 0>;
+			clocks = <&mclkperiph CLOCK_MCHP_MCLKPERIPH_ID_APBD_SERCOM4>,
+					<&gclkperiph CLOCK_MCHP_GCLKPERIPH_ID_SERCOM4_CORE>;
+			clock-names = "mclk", "gclk";
+		};
+
+		sercom5: sercom@43000400 {
+			compatible = "microchip,sercom-g1";
+			status = "disabled";
+			reg = <0x43000400 0x31>;
+			interrupts = <66 0>, <67 0>, <68 0>, <69 0>;
+			clocks = <&mclkperiph CLOCK_MCHP_MCLKPERIPH_ID_APBD_SERCOM5>,
+					<&gclkperiph CLOCK_MCHP_GCLKPERIPH_ID_SERCOM5_CORE>;
+			clock-names = "mclk", "gclk";
+		};
 	};
 };
 

dts/bindings/arm/microchip,sercom-g1.yaml

@@ -0,0 +1,18 @@
+# Copyright (c) 2025 Microchip Technology Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+description: Microchip SERCOM multi-protocol (UART, SPI, I2C) SERCOM unit, group g1
+
+compatible: "microchip,sercom-g1"
+
+include: base.yaml
+
+properties:
+  reg:
+    required: true
+
+  interrupts:
+    required: true
+
+  clocks:
+    required: true

dts/bindings/serial/microchip,sercom-g1-uart.yaml

@@ -0,0 +1,77 @@
+# Copyright (c) 2025 Microchip Technology Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+description: |
+  Microchip sercom-g1 uart driver bindings.
+
+  sercom-g1 uart is used in the below families:
+    - SAM D5x/E5x
+
+compatible: "microchip,sercom-g1-uart"
+
+include:
+  - name: uart-controller.yaml
+  - name: pinctrl-device.yaml
+
+properties:
+  reg:
+    required: true
+
+  interrupts:
+    required: true
+
+  clocks:
+    required: true
+
+  clock-names:
+    required: true
+
+  rxpo:
+    type: int
+    required: true
+    description: |
+      Define the receive data (RxD) pin configuration.
+      An enumeration with the following values:
+
+      +-------+---------------+
+      | Value | RX Pin        |
+      +-------+---------------+
+      |     0 | SERCOM_PAD[0] |
+      +-------+---------------+
+      |     1 | SERCOM_PAD[1] |
+      +-------+---------------+
+      |     2 | SERCOM_PAD[2] |
+      +-------+---------------+
+      |     3 | SERCOM_PAD[3] |
+      +-------+---------------+
+
+
+  txpo:
+    type: int
+    required: true
+    description: |
+      Transmit Data Pinout. An enumeration with values that depend on the
+      hardware being used. This controls both the transmit pins and if
+      hardware flow control is used.
+
+      SAMD5/E5:
+
+      +-------+---------------+---------------+---------------+
+      | Value | TX Pin        | RTS           | CTS           |
+      +-------+---------------+---------------+---------------+
+      |     0 | SERCOM_PAD[0] |           N/A |           N/A |
+      +-------+---------------+---------------+---------------+
+      |     1 | Reserved                                      |
+      +-------+---------------+---------------+---------------+
+      |     2 | SERCOM_PAD[0] | SERCOM_PAD[2] | SERCOM_PAD[3] |
+      +-------+---------------+---------------+---------------+
+      |     3 | SERCOM_PAD[0] | SERCOM_PAD[2] |           N/A |
+      +-------+---------------+---------------+---------------+
+
+  clock-external:
+    type: boolean
+    description: select external clock for uart (external clock if true).
+
+  collision-detection:
+    type: boolean
+    description: Enable collision detection for half-duplex mode.