boards: nxp: mcxa series: Enable FRO16k for LPTMR

Enabled FRO16k for LPTMR when LPTMR clock source
is set to 0x1.

Signed-off-by: Zhaoxiang Jin <[email protected]>

Author: ZhaoxiangJin

boards/nxp/frdm_mcxa153/board.c

@@ -7,6 +7,9 @@
 #include <zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h>
 #include <fsl_clock.h>
 #include <fsl_spc.h>
+#if defined(CONFIG_PM) || defined(CONFIG_POWEROFF)
+#include <fsl_vbat.h>
+#endif
 #include <soc.h>
 
 /* Core clock frequency: 96MHz */
@@ -151,6 +154,9 @@ void board_early_init_hook(void)
  */
 #if DT_PROP(DT_NODELABEL(lptmr0), clk_source) == 0x1
 	CLOCK_SetupFRO16KClocking(kCLKE_16K_SYSTEM | kCLKE_16K_COREMAIN);
+#if defined(CONFIG_PM) || defined(CONFIG_POWEROFF)
+	VBAT_EnableFRO16k(VBAT0, true);
+#endif
 #elif DT_PROP(DT_NODELABEL(lptmr0), clk_source) == 0x3
 	CLOCK_SetClockDiv(kCLOCK_DivLPTMR0, 1u);
 	CLOCK_AttachClk(kFRO12M_to_LPTMR0);

boards/nxp/frdm_mcxa156/board.c

@@ -1,12 +1,15 @@
 /*
- * Copyright 2024  NXP
+ * Copyright 2024-2025 NXP
  * SPDX-License-Identifier: Apache-2.0
  */
 #include <zephyr/init.h>
 #include <zephyr/device.h>
 #include <zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h>
 #include <fsl_clock.h>
 #include <fsl_spc.h>
+#if defined(CONFIG_PM) || defined(CONFIG_POWEROFF)
+#include <fsl_vbat.h>
+#endif
 #include <soc.h>
 
 /* Core clock frequency: 96MHz */
@@ -227,6 +230,9 @@ void board_early_init_hook(void)
  * 3 <- Combination of clocks configured in MRCC_LPTMR0_CLKSEL[MUX] field
  */
 #if DT_PROP(DT_NODELABEL(lptmr0), clk_source) == 0x1
+#if defined(CONFIG_PM) || defined(CONFIG_POWEROFF)
+	VBAT_EnableFRO16k(VBAT0, true);
+#endif
 	CLOCK_SetupFRO16KClocking(kCLKE_16K_SYSTEM | kCLKE_16K_COREMAIN);
 #elif DT_PROP(DT_NODELABEL(lptmr0), clk_source) == 0x3
 	CLOCK_SetClockDiv(kCLOCK_DivLPTMR0, 1u);

boards/nxp/frdm_mcxa266/board.c

@@ -7,6 +7,9 @@
 #include <zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h>
 #include <fsl_clock.h>
 #include <fsl_spc.h>
+#if defined(CONFIG_PM) || defined(CONFIG_POWEROFF)
+#include <fsl_vbat.h>
+#endif
 #include <soc.h>
 
 /* Core clock frequency: 180MHz */
@@ -273,6 +276,9 @@ void board_early_init_hook(void)
  */
 #if DT_PROP(DT_NODELABEL(lptmr0), clk_source) == 0x1
 	CLOCK_SetupFRO16KClocking(kCLKE_16K_SYSTEM | kCLKE_16K_COREMAIN);
+#if defined(CONFIG_PM) || defined(CONFIG_POWEROFF)
+	VBAT_EnableFRO16k(VBAT0, true);
+#endif
 #elif DT_PROP(DT_NODELABEL(lptmr0), clk_source) == 0x3
 	CLOCK_AttachClk(kFRO_LF_DIV_to_LPTMR0);
 	CLOCK_SetClockDiv(kCLOCK_DivLPTMR0, 1u);

boards/nxp/frdm_mcxa346/board.c

@@ -7,6 +7,9 @@
 #include <zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h>
 #include <fsl_clock.h>
 #include <fsl_spc.h>
+#if defined(CONFIG_PM) || defined(CONFIG_POWEROFF)
+#include <fsl_vbat.h>
+#endif
 #include <soc.h>
 
 /* Core clock frequency: 180MHz */
@@ -268,6 +271,9 @@ void board_early_init_hook(void)
  */
 #if DT_PROP(DT_NODELABEL(lptmr0), clk_source) == 0x1
 	CLOCK_SetupFRO16KClocking(kCLKE_16K_SYSTEM | kCLKE_16K_COREMAIN);
+#if defined(CONFIG_PM) || defined(CONFIG_POWEROFF)
+	VBAT_EnableFRO16k(VBAT0, true);
+#endif
 #elif DT_PROP(DT_NODELABEL(lptmr0), clk_source) == 0x3
 	CLOCK_AttachClk(kFRO_LF_DIV_to_LPTMR0);
 	CLOCK_SetClockDiv(kCLOCK_DivLPTMR0, 1u);