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kylebonnicikylebonnici
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devicetree: format files in dts
Signed-off-by: Kyle Micallef Bonnici <[email protected]>
1 parent c8d9f4b commit d08af0d

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520 files changed

+11527
-11807
lines changed

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520 files changed

+11527
-11807
lines changed

‎dts/arc/synopsys/arc_hs4xd.dtsi

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -37,7 +37,6 @@
3737
compatible = "snps,archs4xd";
3838
reg = <3>;
3939
};
40-
4140
};
4241

4342
intc: arcv2-intc {
@@ -46,7 +45,6 @@
4645
#interrupt-cells = <2>;
4746
};
4847

49-
5048
idu_intc: idu-interrupt-controller {
5149
compatible = "snps,archs-idu-intc";
5250
interrupt-controller;
@@ -101,7 +99,7 @@
10199
status = "disabled";
102100
};
103101

104-
uart1: uart@f0027000{
102+
uart1: uart@f0027000 {
105103
compatible = "ns16550";
106104
clock-frequency = <33333333>;
107105
reg = <0xf0027000 0x100>;

‎dts/arc/synopsys/arc_hsdk.dtsi

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -37,7 +37,6 @@
3737
compatible = "snps,archs38";
3838
reg = <3>;
3939
};
40-
4140
};
4241

4342
intc: arcv2-intc {
@@ -46,7 +45,6 @@
4645
#interrupt-cells = <2>;
4746
};
4847

49-
5048
idu_intc: idu-interrupt-controller {
5149
compatible = "snps,archs-idu-intc";
5250
interrupt-controller;
@@ -92,7 +90,7 @@
9290
reg-shift = <2>;
9391
};
9492

95-
uart1: uart@f0026000{
93+
uart1: uart@f0026000 {
9694
compatible = "ns16550";
9795
clock-frequency = <33333333>;
9896
reg = <0xf0026000 0x1000>;
@@ -210,6 +208,5 @@
210208
max-xfer-size = <16>;
211209
status = "disabled";
212210
};
213-
214211
};
215212
};

‎dts/arc/synopsys/arc_iot.dtsi

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -48,7 +48,6 @@
4848
reg = <0x80000000 0x20000>;
4949
};
5050

51-
5251
sram: memory@30000000 {
5352
compatible = "mmio-sram";
5453
reg = <0x30000000 0x20000>;
@@ -71,7 +70,6 @@
7170
compatible = "simple-bus";
7271
ranges;
7372

74-
7573
uart0: uart@80014000 {
7674
compatible = "ns16550";
7775
clock-frequency = <16000000>;
@@ -191,7 +189,6 @@
191189
status = "disabled";
192190
};
193191

194-
195192
i2c0: i2c@80012000 {
196193
clock-frequency = <I2C_BITRATE_STANDARD>;
197194
#address-cells = <1>;
@@ -266,6 +263,5 @@
266263
interrupt-parent = <&intc>;
267264
status = "disabled";
268265
};
269-
270266
};
271267
};

‎dts/arc/synopsys/emsdp.dtsi

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -63,7 +63,6 @@
6363
compatible = "simple-bus";
6464
ranges;
6565

66-
6766
uart0: uart@f0004000 {
6867
compatible = "ns16550";
6968
clock-frequency = <DT_APB_CLK_HZ>;

‎dts/arc/synopsys/emsk.dtsi

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -57,7 +57,6 @@
5757
reg = <0x10000000 0x8000000>;
5858
};
5959

60-
6160
i2c0: i2c@f0004000 {
6261
compatible = "snps,designware-i2c";
6362
clock-frequency = <I2C_BITRATE_STANDARD>;
@@ -151,7 +150,6 @@
151150
max-xfer-size = <16>;
152151
#address-cells = <1>;
153152
#size-cells = <0>;
154-
155153
};
156154

157155
spi1: spi@f0007000 {
@@ -163,8 +161,6 @@
163161
max-xfer-size = <16>;
164162
#address-cells = <1>;
165163
#size-cells = <0>;
166-
167164
};
168-
169165
};
170166
};

‎dts/arm/acsip/s76s.dtsi

Lines changed: 12 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,6 @@
44
* SPDX-License-Identifier: Apache-2.0
55
*/
66

7-
87
#include <st/l0/stm32l073Xz.dtsi>
98
#include <st/l0/stm32l073r(b-z)tx-pinctrl.dtsi>
109

@@ -21,18 +20,18 @@
2120
/* SX1276 nRESET */
2221
reset-gpios = <&gpiob 10 GPIO_ACTIVE_LOW>;
2322
dio-gpios =
24-
/* SX1276 D0 */
25-
<&gpiob 11 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>,
26-
/* SX1276 D1 */
27-
<&gpioc 13 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>,
28-
/* SX1276 D2 */
29-
<&gpiob 9 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>,
30-
/* SX1276 D3 */
31-
<&gpiob 4 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>,
32-
/* SX1276 D4 */
33-
<&gpiob 3 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>,
34-
/* SX1276 D5 */
35-
<&gpioa 15 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>;
23+
/* SX1276 D0 */
24+
<&gpiob 11 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>,
25+
/* SX1276 D1 */
26+
<&gpioc 13 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>,
27+
/* SX1276 D2 */
28+
<&gpiob 9 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>,
29+
/* SX1276 D3 */
30+
<&gpiob 4 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>,
31+
/* SX1276 D4 */
32+
<&gpiob 3 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>,
33+
/* SX1276 D5 */
34+
<&gpioa 15 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>;
3635
spi-max-frequency = <1000000>;
3736
power-amplifier-output = "pa-boost";
3837
};

‎dts/arm/adi/max32/max32650.dtsi

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -175,15 +175,15 @@
175175
status = "disabled";
176176
};
177177

178-
wdt0: watchdog@40003000 {
178+
wdt0: watchdog@40003000 {
179179
compatible = "adi,max32-watchdog";
180180
reg = <0x40003000 0x400>;
181181
interrupts = <1 0>;
182182
clock-source = <ADI_MAX32_PRPH_CLK_SRC_PCLK>;
183183
status = "disabled";
184184
};
185185

186-
wdt1: watchdog@40003400 {
186+
wdt1: watchdog@40003400 {
187187
compatible = "adi,max32-watchdog";
188188
reg = <0x40003400 0x400>;
189189
interrupts = <57 0>;
@@ -196,7 +196,7 @@
196196
reg = <0x40028000 0x1000>;
197197
clocks = <&gcr ADI_MAX32_CLOCK_BUS0 5>;
198198
interrupts = <28 0>, <29 0>, <30 0>, <31 0>, <68 0>, <69 0>, <70 0>, <71 0>,
199-
<72 0>, <73 0>, <74 0>, <75 0>, <76 0>, <77 0>, <78 0>, <79 0>;
199+
<72 0>, <73 0>, <74 0>, <75 0>, <76 0>, <77 0>, <78 0>, <79 0>;
200200
dma-channels = <16>;
201201
status = "disabled";
202202
#dma-cells = <2>;

‎dts/arm/adi/max32/max32655-pinctrl.dtsi

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -401,7 +401,6 @@
401401
/omit-if-no-ref/ wakeup_p3_1: wakeup_p3_1 {
402402
pinmux = <MAX32_PINMUX(3, 1, AF2)>;
403403
};
404-
405404
};
406405
};
407406
};

‎dts/arm/adi/max32/max32655.dtsi

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -85,7 +85,7 @@
8585
#dma-cells = <2>;
8686
};
8787

88-
wdt1: watchdog@40080800 {
88+
wdt1: watchdog@40080800 {
8989
compatible = "adi,max32-watchdog";
9090
reg = <0x40080800 0x400>;
9191
interrupts = <57 0>;

‎dts/arm/adi/max32/max32657_common.dtsi

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -43,21 +43,21 @@
4343
clk_inro: clk_inro {
4444
compatible = "fixed-clock";
4545
#clock-cells = <0>;
46-
clock-frequency = < DT_FREQ_K(8) >;
46+
clock-frequency = <DT_FREQ_K(8)>;
4747
status = "disabled";
4848
};
4949

5050
clk_ibro: clk_ibro {
5151
compatible = "fixed-clock";
5252
#clock-cells = <0>;
53-
clock-frequency = < 7372800 >;
53+
clock-frequency = <7372800>;
5454
status = "disabled";
5555
};
5656

5757
clk_ertco: clk_ertco {
5858
compatible = "fixed-clock";
5959
#clock-cells = <0>;
60-
clock-frequency = < 32768 >;
60+
clock-frequency = <32768>;
6161
status = "disabled";
6262
};
6363

@@ -146,7 +146,7 @@
146146
status = "disabled";
147147
};
148148

149-
wdt0: watchdog@3000 {
149+
wdt0: watchdog@3000 {
150150
compatible = "adi,max32-watchdog";
151151
reg = <0x3000 0x400>;
152152
interrupts = <1 0>;

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