Bl602 sifive e24 riscv

.github/workflows/real-time-cpp.yml

@@ -236,19 +236,19 @@ jobs:
     strategy:
       fail-fast: false
       matrix:
-        suite: [ riscvfe310, wch_ch32v307, xtensa_esp32_s3_riscv_cop ]
+        suite: [ bl602_sifive_e24_riscv, riscvfe310, wch_ch32v307, xtensa_esp32_s3_riscv_cop ]
     steps:
       - uses: actions/checkout@v4
         with:
           fetch-depth: '0'
       - name: update-tools
         run: |
-          wget --no-check-certificate https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack/releases/download/v14.2.0-3/xpack-riscv-none-elf-gcc-14.2.0-3-linux-x64.tar.gz
-          tar -xzf xpack-riscv-none-elf-gcc-14.2.0-3-linux-x64.tar.gz -C ${{ runner.workspace }}
+          wget --no-check-certificate https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack/releases/download/v15.2.0-1/xpack-riscv-none-elf-gcc-15.2.0-1-linux-x64.tar.gz
+          tar -xzf xpack-riscv-none-elf-gcc-15.2.0-1-linux-x64.tar.gz -C ${{ runner.workspace }}
         working-directory: ./
       - name: target-riscv-${{ matrix.suite }}
         run: |
-          PATH="${{ runner.workspace }}/xpack-riscv-none-elf-gcc-14.2.0-3/bin:$PATH"
+          PATH="${{ runner.workspace }}/xpack-riscv-none-elf-gcc-15.2.0-1/bin:$PATH"
           ./target/build/build.sh ${{ matrix.suite }} rebuild
           ls -la ./bin/ref_app.elf ./bin/ref_app.hex ./bin/ref_app.map ./bin/ref_app.s19
         working-directory: ./ref_app/

readme.md

@@ -71,11 +71,12 @@ The reference application supports the following targets (in alpha-numeric order
 | Target name (as used in build command) | Target Description                                          | *(breadboard) |
 | -------------------------------------- | ----------------------------------------------------------- | ------------- |
 | `am335x`                               | BeagleBone with Texas Instruments(R) AM335x ARM(R) A8       |               |
-| `am6254_soc_`                          | PocketBeagle2 with multicore Texas Instruments(R) AM6254    |               |
+| `am6254_soc`                           | PocketBeagle2 with multicore Texas Instruments(R) AM6254    |               |
 | `atmega2560`                           | MICROCHIP(R) [former ATMEL(R)] AVR(R) ATmega2560            |               |
 | `atmega4809`                           | MICROCHIP(R) [former ATMEL(R)] AVR(R) ATmegax4809           | X             |
 | `avr` (as used in the book)            | MICROCHIP(R) [former ATMEL(R)] AVR(R) ATmega328P            | X             |
 | `bcm2835_raspi_b`                      | RaspberryPi(R) Zero with ARM1176-JZFS(TM)                   | X             |
+| `bl602_sifive_e24_riscv`               | BL602 single-core RISC-V (SiFive E24)                       | X             |
 | `Debug`/`Release`                      | PC on `Win*` via MSVC x64 compiler `Debug`/`Release`        |               |
 | `host`                                 | PC/Workstation on `Win*`/`mingw64`/`*nix` via host compiler |               |
 | `lpc11c24`                             | NXP(R) OM13093 LPC11C24 board ARM(R) Cortex(R)-M0+          |               |
@@ -415,6 +416,13 @@ called `target avr` (as used in the book) runs
 on a classic ARDUINO(R) compatible board.
 The program toggles the yellow LED on `portb.5`.
 
+Target `bl602_sifive_e24_riscv` contains a fully manually-written bare-metal project
+for the BL602 single-core RISC-V (SiFive E24), making no use of any SDK.
+The boot code and bare-metal register interactions are based
+on the creative work in
+[`Chalandi/Baremetal_BL602_SiFive_E24_RISC-V`](https://github.com/Chalandi/Baremetal_BL602_SiFive_E24_RISC-V).
+This configuration toggles pin `IO3` and requires a self-fitted LED.
+
 The ARM(R) 1176-JZF-S configuration (called `target bcm2835_raspi_b`) runs on the
 RaspberryPi(R) Zero (PiZero) single core controller.
 This project creates a bare-metal program for the PiZero.

ref_app/ref_app.sln

@@ -52,6 +52,7 @@ Global
 		target atmega4809|x64 = target atmega4809|x64
 		target avr|x64 = target avr|x64
 		target bcm2835_raspi_b|x64 = target bcm2835_raspi_b|x64
+		target bl602_sifive_e24_riscv|x64 = target bl602_sifive_e24_riscv|x64
 		target lpc11c24|x64 = target lpc11c24|x64
 		target nxp_imxrt1062|x64 = target nxp_imxrt1062|x64
 		target riscvfe310|x64 = target riscvfe310|x64
@@ -86,6 +87,7 @@ Global
 		{C8B59726-9319-45C3-8F11-F9F388FB6A2C}.target atmega4809|x64.ActiveCfg = Release|x64
 		{C8B59726-9319-45C3-8F11-F9F388FB6A2C}.target avr|x64.ActiveCfg = Release|x64
 		{C8B59726-9319-45C3-8F11-F9F388FB6A2C}.target bcm2835_raspi_b|x64.ActiveCfg = Release|x64
+		{C8B59726-9319-45C3-8F11-F9F388FB6A2C}.target bl602_sifive_e24_riscv|x64.ActiveCfg = Release|x64
 		{C8B59726-9319-45C3-8F11-F9F388FB6A2C}.target lpc11c24|x64.ActiveCfg = Release|x64
 		{C8B59726-9319-45C3-8F11-F9F388FB6A2C}.target nxp_imxrt1062|x64.ActiveCfg = Release|x64
 		{C8B59726-9319-45C3-8F11-F9F388FB6A2C}.target riscvfe310|x64.ActiveCfg = Release|x64
@@ -122,6 +124,8 @@ Global
 		{30CE370B-40F3-4BCD-8986-64AAFF8971BD}.target avr|x64.Build.0 = target avr|x64
 		{30CE370B-40F3-4BCD-8986-64AAFF8971BD}.target bcm2835_raspi_b|x64.ActiveCfg = target bcm2835_raspi_b|x64
 		{30CE370B-40F3-4BCD-8986-64AAFF8971BD}.target bcm2835_raspi_b|x64.Build.0 = target bcm2835_raspi_b|x64
+		{30CE370B-40F3-4BCD-8986-64AAFF8971BD}.target bl602_sifive_e24_riscv|x64.ActiveCfg = target bl602_sifive_e24_riscv|x64
+		{30CE370B-40F3-4BCD-8986-64AAFF8971BD}.target bl602_sifive_e24_riscv|x64.Build.0 = target bl602_sifive_e24_riscv|x64
 		{30CE370B-40F3-4BCD-8986-64AAFF8971BD}.target lpc11c24|x64.ActiveCfg = target lpc11c24|x64
 		{30CE370B-40F3-4BCD-8986-64AAFF8971BD}.target lpc11c24|x64.Build.0 = target lpc11c24|x64
 		{30CE370B-40F3-4BCD-8986-64AAFF8971BD}.target nxp_imxrt1062|x64.ActiveCfg = target nxp_imxrt1062|x64

ref_app/ref_app.vcxproj

@@ -473,6 +473,46 @@
       <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">true</ExcludedFromBuild>
       <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Release|x64'">true</ExcludedFromBuild>
     </ClCompile>
+    <ClCompile Include="src\mcal\bl602_sifive_e24_riscv\mcal_cpu.cpp">
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">true</ExcludedFromBuild>
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Release|x64'">true</ExcludedFromBuild>
+    </ClCompile>
+    <ClCompile Include="src\mcal\bl602_sifive_e24_riscv\mcal_eep.cpp">
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">true</ExcludedFromBuild>
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Release|x64'">true</ExcludedFromBuild>
+    </ClCompile>
+    <ClCompile Include="src\mcal\bl602_sifive_e24_riscv\mcal_gpt.cpp">
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">true</ExcludedFromBuild>
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Release|x64'">true</ExcludedFromBuild>
+    </ClCompile>
+    <ClCompile Include="src\mcal\bl602_sifive_e24_riscv\mcal_irq.cpp">
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">true</ExcludedFromBuild>
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Release|x64'">true</ExcludedFromBuild>
+    </ClCompile>
+    <ClCompile Include="src\mcal\bl602_sifive_e24_riscv\mcal_led.cpp">
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">true</ExcludedFromBuild>
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Release|x64'">true</ExcludedFromBuild>
+    </ClCompile>
+    <ClCompile Include="src\mcal\bl602_sifive_e24_riscv\mcal_osc.cpp">
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">true</ExcludedFromBuild>
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Release|x64'">true</ExcludedFromBuild>
+    </ClCompile>
+    <ClCompile Include="src\mcal\bl602_sifive_e24_riscv\mcal_port.cpp">
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">true</ExcludedFromBuild>
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Release|x64'">true</ExcludedFromBuild>
+    </ClCompile>
+    <ClCompile Include="src\mcal\bl602_sifive_e24_riscv\mcal_pwm.cpp">
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">true</ExcludedFromBuild>
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Release|x64'">true</ExcludedFromBuild>
+    </ClCompile>
+    <ClCompile Include="src\mcal\bl602_sifive_e24_riscv\mcal_spi.cpp">
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">true</ExcludedFromBuild>
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Release|x64'">true</ExcludedFromBuild>
+    </ClCompile>
+    <ClCompile Include="src\mcal\bl602_sifive_e24_riscv\mcal_wdg.cpp">
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">true</ExcludedFromBuild>
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Release|x64'">true</ExcludedFromBuild>
+    </ClCompile>
     <ClCompile Include="src\mcal\host\mcal_cpu.cpp" />
     <ClCompile Include="src\mcal\host\mcal_eep.cpp" />
     <ClCompile Include="src\mcal\host\mcal_gpt.cpp" />
@@ -1868,6 +1908,62 @@
       <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">true</ExcludedFromBuild>
       <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Release|x64'">true</ExcludedFromBuild>
     </ClInclude>
+    <ClInclude Include="src\mcal\bl602_sifive_e24_riscv\mcal_benchmark.h">
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">true</ExcludedFromBuild>
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Release|x64'">true</ExcludedFromBuild>
+    </ClInclude>
+    <ClInclude Include="src\mcal\bl602_sifive_e24_riscv\mcal_cpu.h">
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">true</ExcludedFromBuild>
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Release|x64'">true</ExcludedFromBuild>
+    </ClInclude>
+    <ClInclude Include="src\mcal\bl602_sifive_e24_riscv\mcal_eep.h">
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">true</ExcludedFromBuild>
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Release|x64'">true</ExcludedFromBuild>
+    </ClInclude>
+    <ClInclude Include="src\mcal\bl602_sifive_e24_riscv\mcal_gpt.h">
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">true</ExcludedFromBuild>
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Release|x64'">true</ExcludedFromBuild>
+    </ClInclude>
+    <ClInclude Include="src\mcal\bl602_sifive_e24_riscv\mcal_irq.h">
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">true</ExcludedFromBuild>
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Release|x64'">true</ExcludedFromBuild>
+    </ClInclude>
+    <ClInclude Include="src\mcal\bl602_sifive_e24_riscv\mcal_led.h">
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">true</ExcludedFromBuild>
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Release|x64'">true</ExcludedFromBuild>
+    </ClInclude>
+    <ClInclude Include="src\mcal\bl602_sifive_e24_riscv\mcal_memory_progmem.h">
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">true</ExcludedFromBuild>
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Release|x64'">true</ExcludedFromBuild>
+    </ClInclude>
+    <ClInclude Include="src\mcal\bl602_sifive_e24_riscv\mcal_osc.h">
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">true</ExcludedFromBuild>
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Release|x64'">true</ExcludedFromBuild>
+    </ClInclude>
+    <ClInclude Include="src\mcal\bl602_sifive_e24_riscv\mcal_port.h">
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">true</ExcludedFromBuild>
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Release|x64'">true</ExcludedFromBuild>
+    </ClInclude>
+    <ClInclude Include="src\mcal\bl602_sifive_e24_riscv\mcal_pwm.h">
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">true</ExcludedFromBuild>
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Release|x64'">true</ExcludedFromBuild>
+    </ClInclude>
+    <ClInclude Include="src\mcal\bl602_sifive_e24_riscv\mcal_reg.h">
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">true</ExcludedFromBuild>
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Release|x64'">true</ExcludedFromBuild>
+    </ClInclude>
+    <ClInclude Include="src\mcal\bl602_sifive_e24_riscv\mcal_ser.h">
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">true</ExcludedFromBuild>
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Release|x64'">true</ExcludedFromBuild>
+    </ClInclude>
+    <ClInclude Include="src\mcal\bl602_sifive_e24_riscv\mcal_spi.h">
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">true</ExcludedFromBuild>
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Release|x64'">true</ExcludedFromBuild>
+    </ClInclude>
+    <ClInclude Include="src\mcal\bl602_sifive_e24_riscv\mcal_wdg.h">
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">true</ExcludedFromBuild>
+      <ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Release|x64'">true</ExcludedFromBuild>
+    </ClInclude>
     <ClInclude Include="src\mcal\host\mcal_benchmark.h" />
     <ClInclude Include="src\mcal\host\mcal_cpu.h" />
     <ClInclude Include="src\mcal\host\mcal_eep.h" />

ref_app/ref_app.vcxproj.filters

@@ -281,6 +281,9 @@
     <Filter Include="src\mcal\am6254_soc">
       <UniqueIdentifier>{74714130-9ba7-45a5-a860-74f8cb6eae22}</UniqueIdentifier>
     </Filter>
+    <Filter Include="src\mcal\bl602_sifive_e24_riscv">
+      <UniqueIdentifier>{9575513c-b5da-473e-9095-bbd968c02f6b}</UniqueIdentifier>
+    </Filter>
   </ItemGroup>
   <ItemGroup>
     <ClCompile Include="src\app\led\app_led.cpp">
@@ -1303,6 +1306,36 @@
     <ClCompile Include="src\mcal\am6254_soc\mcal_spi.cpp">
       <Filter>src\mcal\am6254_soc</Filter>
     </ClCompile>
+    <ClCompile Include="src\mcal\bl602_sifive_e24_riscv\mcal_cpu.cpp">
+      <Filter>src\mcal\bl602_sifive_e24_riscv</Filter>
+    </ClCompile>
+    <ClCompile Include="src\mcal\bl602_sifive_e24_riscv\mcal_eep.cpp">
+      <Filter>src\mcal\bl602_sifive_e24_riscv</Filter>
+    </ClCompile>
+    <ClCompile Include="src\mcal\bl602_sifive_e24_riscv\mcal_gpt.cpp">
+      <Filter>src\mcal\bl602_sifive_e24_riscv</Filter>
+    </ClCompile>
+    <ClCompile Include="src\mcal\bl602_sifive_e24_riscv\mcal_irq.cpp">
+      <Filter>src\mcal\bl602_sifive_e24_riscv</Filter>
+    </ClCompile>
+    <ClCompile Include="src\mcal\bl602_sifive_e24_riscv\mcal_led.cpp">
+      <Filter>src\mcal\bl602_sifive_e24_riscv</Filter>
+    </ClCompile>
+    <ClCompile Include="src\mcal\bl602_sifive_e24_riscv\mcal_osc.cpp">
+      <Filter>src\mcal\bl602_sifive_e24_riscv</Filter>
+    </ClCompile>
+    <ClCompile Include="src\mcal\bl602_sifive_e24_riscv\mcal_port.cpp">
+      <Filter>src\mcal\bl602_sifive_e24_riscv</Filter>
+    </ClCompile>
+    <ClCompile Include="src\mcal\bl602_sifive_e24_riscv\mcal_pwm.cpp">
+      <Filter>src\mcal\bl602_sifive_e24_riscv</Filter>
+    </ClCompile>
+    <ClCompile Include="src\mcal\bl602_sifive_e24_riscv\mcal_spi.cpp">
+      <Filter>src\mcal\bl602_sifive_e24_riscv</Filter>
+    </ClCompile>
+    <ClCompile Include="src\mcal\bl602_sifive_e24_riscv\mcal_wdg.cpp">
+      <Filter>src\mcal\bl602_sifive_e24_riscv</Filter>
+    </ClCompile>
   </ItemGroup>
   <ItemGroup>
     <ClInclude Include="src\math\calculus\derivative.h">
@@ -2952,6 +2985,48 @@
     <ClInclude Include="src\util\utility\util_attribute.h">
       <Filter>src\util\utility</Filter>
     </ClInclude>
+    <ClInclude Include="src\mcal\bl602_sifive_e24_riscv\mcal_cpu.h">
+      <Filter>src\mcal\bl602_sifive_e24_riscv</Filter>
+    </ClInclude>
+    <ClInclude Include="src\mcal\bl602_sifive_e24_riscv\mcal_eep.h">
+      <Filter>src\mcal\bl602_sifive_e24_riscv</Filter>
+    </ClInclude>
+    <ClInclude Include="src\mcal\bl602_sifive_e24_riscv\mcal_gpt.h">
+      <Filter>src\mcal\bl602_sifive_e24_riscv</Filter>
+    </ClInclude>
+    <ClInclude Include="src\mcal\bl602_sifive_e24_riscv\mcal_irq.h">
+      <Filter>src\mcal\bl602_sifive_e24_riscv</Filter>
+    </ClInclude>
+    <ClInclude Include="src\mcal\bl602_sifive_e24_riscv\mcal_led.h">
+      <Filter>src\mcal\bl602_sifive_e24_riscv</Filter>
+    </ClInclude>
+    <ClInclude Include="src\mcal\bl602_sifive_e24_riscv\mcal_memory_progmem.h">
+      <Filter>src\mcal\bl602_sifive_e24_riscv</Filter>
+    </ClInclude>
+    <ClInclude Include="src\mcal\bl602_sifive_e24_riscv\mcal_osc.h">
+      <Filter>src\mcal\bl602_sifive_e24_riscv</Filter>
+    </ClInclude>
+    <ClInclude Include="src\mcal\bl602_sifive_e24_riscv\mcal_port.h">
+      <Filter>src\mcal\bl602_sifive_e24_riscv</Filter>
+    </ClInclude>
+    <ClInclude Include="src\mcal\bl602_sifive_e24_riscv\mcal_pwm.h">
+      <Filter>src\mcal\bl602_sifive_e24_riscv</Filter>
+    </ClInclude>
+    <ClInclude Include="src\mcal\bl602_sifive_e24_riscv\mcal_reg.h">
+      <Filter>src\mcal\bl602_sifive_e24_riscv</Filter>
+    </ClInclude>
+    <ClInclude Include="src\mcal\bl602_sifive_e24_riscv\mcal_ser.h">
+      <Filter>src\mcal\bl602_sifive_e24_riscv</Filter>
+    </ClInclude>
+    <ClInclude Include="src\mcal\bl602_sifive_e24_riscv\mcal_spi.h">
+      <Filter>src\mcal\bl602_sifive_e24_riscv</Filter>
+    </ClInclude>
+    <ClInclude Include="src\mcal\bl602_sifive_e24_riscv\mcal_wdg.h">
+      <Filter>src\mcal\bl602_sifive_e24_riscv</Filter>
+    </ClInclude>
+    <ClInclude Include="src\mcal\bl602_sifive_e24_riscv\mcal_benchmark.h">
+      <Filter>src\mcal\bl602_sifive_e24_riscv</Filter>
+    </ClInclude>
   </ItemGroup>
   <ItemGroup>
     <None Include="src\util\STL\algorithm">

ref_app/src/mcal/am6254_soc/mcal_gpt.cpp

@@ -11,11 +11,19 @@
 
 auto mcal::gpt::secure::get_time_elapsed() -> mcal::gpt::value_type
 {
-  // Get the system tick from the system counter register.
-  const value_type consistent_microsecond_tick = static_cast<value_type>(ARM64_READ_SYSREG(CNTPCT_EL0));
+  // Get the consistent system tick from the system counter register.
+  const value_type
+    consistent_microsecond_tick
+    {
+      static_cast<value_type>(ARM64_READ_SYSREG(CNTPCT_EL0))
+    };
 
   // Convert the consistent tick to microseconds.
-  return static_cast<value_type>(static_cast<value_type>(consistent_microsecond_tick + UINT64_C(100)) / UINT64_C(200));
+  return
+    static_cast<value_type>
+    (
+      static_cast<value_type>(consistent_microsecond_tick + UINT64_C(100)) / UINT64_C(200)
+    );
 }
 
 auto mcal::gpt::secure::get_time_elapsed_core1() -> mcal::gpt::value_type_core1

ref_app/src/mcal/bl602_sifive_e24_riscv/mcal_benchmark.h

@@ -0,0 +1,24 @@
+///////////////////////////////////////////////////////////////////////////////
+//  Copyright Christopher Kormanyos 2014 - 2025.
+//  Distributed under the Boost Software License,
+//  Version 1.0. (See accompanying file LICENSE_1_0.txt
+//  or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#ifndef MCAL_BENCHMARK_2014_04_16_H
+  #define MCAL_BENCHMARK_2014_04_16_H
+
+  #include <mcal_port.h>
+  #include <mcal_reg.h>
+
+  #include <cstdint>
+
+  namespace mcal
+  {
+    namespace benchmark
+    {
+      using benchmark_port_type = mcal::port::port_pin<unsigned { UINT8_C(4) }>;
+    }
+  }
+
+#endif // MCAL_BENCHMARK_2014_04_16_H

ref_app/src/mcal/bl602_sifive_e24_riscv/mcal_cpu.cpp

@@ -0,0 +1,12 @@
+///////////////////////////////////////////////////////////////////////////////
+//  Copyright Christopher Kormanyos 2007 - 2025.
+//  Distributed under the Boost Software License,
+//  Version 1.0. (See accompanying file LICENSE_1_0.txt
+//  or copy at http://www.boost.org/LICENSE_1_0.txt)
+//
+
+#include <mcal_cpu.h>
+
+auto mcal::cpu::init() -> void
+{
+}