BirchStream FSP (0041D92)

BirchStreamFspBinPkg/ap/Include/CxlNodeHob.h

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+/** @file
+
+Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+  list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+  list of conditions and the following disclaimer in the documentation and/or
+  other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+  be used to endorse or promote products derived from this software without
+  specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+  THE POSSIBILITY OF SUCH DAMAGE.
+
+  This file is automatically generated. Please do NOT modify !!!
+
+**/
+
+#ifndef _CXL_NODE_HOB_
+#define _CXL_NODE_HOB_
+
+#define CXL_NODE_HOB_GUID          { 0xdd8ae009, 0xda5a, 0x44a3, { 0xbe, 0x18, 0xda, 0x0c, 0x16, 0xc5, 0xaf, 0x5c } }
+
+#ifndef MAX_IIO_STACK
+#define MAX_IIO_STACK              16
+#endif
+
+#ifndef MAX_CXL_HDM_RANGES
+#define MAX_CXL_HDM_RANGES        0x2        // Maximum number of CXL HDM ranges per CXL end device.
+#endif
+
+#ifndef MAX_CXL_PER_SOCKET
+#define MAX_CXL_PER_SOCKET          MAX_IIO_STACK
+#endif
+
+#define CXL_NODE_ATTR_MEM           BIT0
+#define CXL_NODE_ATTR_PERSISTENT    BIT1
+#define CXL_NODE_ATTR_MEM_HW_INIT   BIT2
+#define CXL_NODE_ATTR_ACCELERATOR   BIT3
+#define CXL_NODE_ATTR_HOT_PLUGGABLE BIT4
+
+typedef UINT32 CXL_NODE_ATTR;
+
+#pragma pack(1)
+
+//
+// CDAT DSEMTS EFI Memory Type and Attribute
+//
+typedef enum {
+  CxlEfiConventionalMemory        = 0x0,
+  CxlEfiConventionalMemorySp      = 0x1,
+  CxlEfiReservedMemoryType        = 0x2,
+  MaxCxlEfiMemType
+} CXL_EFI_MEM_TYPE;
+
+typedef struct {
+  UINT32              RdLatency;
+  UINT32              WrLatency;
+  UINT32              RdBandwidth;
+  UINT32              WrBandwidth;
+} CXL_PERF_DATA;
+
+typedef struct {
+  UINT64                       SerialNumber;
+  UINT16                       VendorId;
+  CXL_NODE_ATTR                Attr;
+  UINT32                       Address;
+  UINT32                       Size;
+  UINT8                        Ways;
+  UINT8                        SocketBitmap;
+  BOOLEAN                      AcpiSratSpMemFlag;
+  CXL_EFI_MEM_TYPE             EfiMemType;
+  CXL_PERF_DATA                InitiatorPerfData;        // Performance data between device egress and initiator.
+  CXL_PERF_DATA                TargetPerfData;           // Performance data of entire target memory region.
+  CXL_PERF_DATA                InitiatorTargetPerfData;  // performance data between initiator and the device memory.
+} CXL_NODE_INFO;
+
+typedef struct {
+  UINT8            CxlNodeCount;
+  //
+  // CXL node info for UEFI memory map and ACPI tables construction
+  //
+  CXL_NODE_INFO    CxlNodeInfo[MAX_IIO_STACK * MAX_CXL_HDM_RANGES];
+} CXL_NODE_SOCKET;
+
+#pragma pack()
+
+#endif //#ifndef _CXL_NODE_HOB_

BirchStreamFspBinPkg/ap/Include/FspAcpiHobs.h

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+/** @file
+
+Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+  list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+  list of conditions and the following disclaimer in the documentation and/or
+  other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+  be used to endorse or promote products derived from this software without
+  specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+  THE POSSIBILITY OF SUCH DAMAGE.
+
+  This file is automatically generated. Please do NOT modify !!!
+
+**/
+
+#ifndef __FSP_ACPI_HOBS__
+#define __FSP_ACPI_HOBS__
+
+//Typecast HOB pointer to APEI table structure of ACPI version 6.2
+#define FSP_RAS_ACPI_HOB_GUID             { 0x826785ee, 0xa8e0, 0x4d8f, { 0x82, 0x6f, 0x54, 0x29, 0x2c, 0xe7, 0x6f, 0xe6 } }
+
+//Typecast HOB pointer to ACPI CXL CEDT table structure
+#define FSP_CXL_CEDT_ACPI_HOB_GUID        { 0x5CB7A12A, 0x8B2D, 0x485A, { 0xB7, 0x04, 0xC0, 0x52, 0x49, 0x56, 0x81, 0xE7 } }
+
+// Typecast HOB pointer to MEM_TRAINING_DATA_HOB_HEADER. 
+// User with NDA clearance should refer to RC code for latest structure definition.
+#define FSP_MEM_TRAINING_DATA_HOB_GUID    { 0x7e8b89e2, 0x8b84, 0x4cb3, { 0x86, 0x8f, 0x10, 0xb6, 0x78, 0x71, 0xa2, 0xc0 }}
+
+// Typecast HOB pointer to EWL_PRIVATE_DATA. 
+// User with NDA clearance should refer to RC code for latest structure definition.
+#define FSP_EWL_ID_HOB_GUID                   { 0xd8e05800, 0x5e, 0x4462, { 0xaa, 0x3d, 0x9c, 0x6b, 0x47, 0x4, 0x92, 0xb } };
+
+//Typecast HOB pointer to RAS_ACPI_PARAM_HOB_DATA;
+#define RAS_ACPI_PARAM_HOB_GUID           {0x594dfe5c, 0x7a87, 0x49dc, { 0x8f, 0x33, 0xea, 0x83, 0x4d, 0x6f, 0x18, 0x90 } }
+
+#endif  // __FSP_ACPI_HOBS__

BirchStreamFspBinPkg/ap/Include/FspEdpcParam.h

@@ -0,0 +1,71 @@
+/** @file
+
+Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+  list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+  list of conditions and the following disclaimer in the documentation and/or
+  other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+  be used to endorse or promote products derived from this software without
+  specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+  THE POSSIBILITY OF SUCH DAMAGE.
+
+  This file is automatically generated. Please do NOT modify !!!
+
+**/
+
+#ifndef __FSP_EDPC_PARAM__
+#define __FSP_EDPC_PARAM__
+
+#pragma pack(1)
+typedef struct {
+  UINT8         Segment;
+  UINT8         Bus;
+  UINT8         Device;
+  UINT8         Function;
+} EDPC_DEV_INFO;
+
+typedef struct {
+  //
+  // There are three possible statuses of Valid infomation
+  // EPDC_INFO_VALID, EDPC_INFO_NOTIFIED, EDPC_INFO_CLEARED
+  //
+  UINT8           Valid;
+  EDPC_DEV_INFO   EdpcTrigger;
+  EDPC_DEV_INFO   EdpcRootPort;
+  UINT8           NotifyType;
+} EDPC_INFO;
+
+typedef struct {
+  UINT16          OsNativeAerSupport;
+  UINT16          Reserved;
+  UINT64          Reserved1[400];
+  EDPC_INFO       EdpcInfo;
+  UINT64          EmcaL1DirAddr;
+  UINT8           EmcaEn;
+  UINT8           ElogEn;
+  UINT8           WheaEnabled;
+  UINT8           WheaSupportEn;
+  UINT64          ReadAckAddress;
+  UINT64          OobReadAckAddress;
+  UINT32          SoftwareSmi;
+} RAS_ACPI_PARAM;
+
+#pragma pack()
+#endif  // __FSP_EDPC_PARAM__

BirchStreamFspBinPkg/ap/Include/FspErrorInfoHob.h

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+/** @file
+
+Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+  list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+  list of conditions and the following disclaimer in the documentation and/or
+  other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+  be used to endorse or promote products derived from this software without
+  specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+  THE POSSIBILITY OF SUCH DAMAGE.
+
+  This file is automatically generated. Please do NOT modify !!!
+
+**/
+
+#ifndef _FSP_ERROR_INFO_HOB_H_
+#define _FSP_ERROR_INFO_HOB_H_
+
+///
+/// GUID value indicating the FSP error information.
+///
+#define FSP_ERROR_INFO_HOB_GUID { 0x611e6a88, 0xadb7, 0x4301, { 0x93, 0xff, 0xe4, 0x73, 0x04, 0xb4, 0x3d, 0xa6 } }
+
+#define FSP_ERROR_INFO_STATUS_CODE_TYPE          (EFI_ERROR_CODE | EFI_ERROR_UNRECOVERED)
+///
+/// FSP Error Information Block.
+///
+#pragma pack(1)
+typedef struct {
+  ///
+  /// GUID HOB header.
+  ///
+  EFI_HOB_GUID_TYPE     GuidHob;
+
+  ///
+  /// ReportStatusCode () type identifier.
+  ///
+  EFI_STATUS_CODE_TYPE  Type;
+
+  ///
+  /// ReportStatusCode () value.
+  ///
+  EFI_STATUS_CODE_VALUE Value;
+
+  ///
+  /// ReportStatusCode () Instance number.
+  ///
+  UINT32                Instance;
+
+  ///
+  /// Optional GUID which may be used to identify
+  /// which internal component of the FSP was
+  /// executing at the time of the error.
+  ///
+  EFI_GUID              CallerId;
+
+  ///
+  /// GUID identifying the nature of the fatal error.
+  ///
+  EFI_GUID              ErrorType;
+
+  ///
+  /// EFI_STATUS code describing the error encountered.
+  ///
+  UINT32                Status;
+} FSP_ERROR_INFO_HOB;
+
+#pragma pack()
+
+#endif //_FSP_ERROR_INFO_H_

BirchStreamFspBinPkg/ap/Include/FspExtMemoryPprHob.h

@@ -0,0 +1,70 @@
+/** @file
+
+Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice, this
+  list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice, this
+  list of conditions and the following disclaimer in the documentation and/or
+  other materials provided with the distribution.
+* Neither the name of Intel Corporation nor the names of its contributors may
+  be used to endorse or promote products derived from this software without
+  specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+  THE POSSIBILITY OF SUCH DAMAGE.
+
+  This file is automatically generated. Please do NOT modify !!!
+
+**/
+
+#ifndef _FSP_EXT_MEMORY_PPR_HOB_H_
+#define _FSP_EXT_MEMORY_PPR_HOB_H_
+
+#include "FspGlobals.h"
+
+#define FSP_EXT_MEMORY_PPR_HOB_GUID   { 0x3956C6DA, 0x35B6, 0x4036, { 0x93, 0xE4, 0xB1, 0x51, 0x38, 0x60, 0x21, 0x1E } }
+
+#pragma pack(1)
+
+typedef struct FspExtPprAddr {
+  UINT8               Status;
+  UINT8               ErrorType;
+  UINT8               Socket;
+  UINT8               MemoryController;
+  UINT8               Channel;
+  UINT8               Dimm;
+  UINT8               Bank;
+  UINT32              Row;
+  UINT8               Rank;
+} FSP_EXT_PPR_ADDR;
+
+typedef struct FspExtPprDdrInfo {
+  UINT8               Count;
+  FSP_EXT_PPR_ADDR    PprAddresses[FSP_MAX_PPR_ADDR_ENTRIES_DDR];
+} FSP_EXT_DDR_PPR_INFO;
+
+typedef struct FspExtMemoryPprData {
+  FSP_EXT_DDR_PPR_INFO          DdrPprInfo;
+} FSP_EXT_MEMORY_PPR_DATA;
+
+typedef struct FspExtMemoryPprHob {
+  FSP_EXT_HEADER                Header;
+  FSP_EXT_MEMORY_PPR_DATA       Data;
+} FSP_EXT_MEMORY_PPR_HOB;
+
+#pragma pack()
+
+#endif // _FSP_EXT_MEMORY_PPR_HOB_H_