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[CIR][CUDA] Emit address space casts on lowering - #1518

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Open

[CIR][CUDA] Emit address space casts on lowering#1518
AdUhTkJm wants to merge 2419 commits into
llvm:mainfrom
AdUhTkJm:addrspace

This pull request is big! We're only showing the most recent 250 commits

Commits on Mar 17, 2025
- Revert "[CIR][CIRGen][NFCI] Take a step into getting scope information to match OG"
  
  bcardosolopes
  authored and
  lanza
  committed
  e5baa79
- [CIR][CodeGen][NFC] Refactor emitCXXGlobalVarDeclInit to match codegen
  lanza
  committed
  14bf0c0
- [CIR][CodeGen] Flesh out some more missing features from Address
  lanza
  committed
  41295de
- [CIR][CIRGen] Handle NYI in CIRGenModule::tryEmitBaseDestructorAsAlias (#1180)
  
  ChuanqiXu9
  authored and
  lanza
  committed
  b56869f
- [CIR][cir-translate] Support specifying target for `cir-translate` (#1186)
  
  seven-mile
  authored and
  lanza
  committed
  d0253d9
- [CIR][CIRGen][Builtin][Neon] Lower neon_vqmovns_s32 and add CIR PoisonAttr (#1199)
  
  ghehg
  authored and
  lanza
  committed
  54ea4fe
- [CIR][Dialect] Add BinOpKind_Max (#1201)
  
  ghehg
  authored and
  lanza
  committed
  70b0bc9
- [CIR] Fix tests with LLVM_LINK_LLVM_DYLIB (#1222)
  
  smeenai
  authored and
  lanza
  committed
  a7a0268
- [CIR] Remove the !cir.void return type for functions returning void (#1203)
  
  keryell
  authored and
  lanza
  committed
  5c50ed9
- [CIR][CIRGen][Builtin][Neon] Lower neon_vaddvq_u32 and neon_vaddvq_u64 (#1225)
  
  ghehg
  authored and
  lanza
  committed
  ff8e44c
- [CIR][CIRGen][Builtin][Neon] Lower neon_vrsraq_n_v and neon_vrsra_n_v (#1230)
  
  ghehg
  authored and
  lanza
  committed
  7697fec
- [CIR][CIRGen][Builtin][Neon] Lower neon_vaddlvq_s16 (#1231)
  
  ghehg
  authored and
  lanza
  committed
  aa02aa7
- [CIR][CIRGen] Add uwtable attribute (#1226)
  
  smeenai
  authored and
  lanza
  committed
  98a09b6
- [CIR][CIRGen] Match skeleton for setCIRFunctionAttributesForDefinition (#1232)
  
  smeenai
  authored and
  lanza
  committed
  7a9be9d
- [CIR][ThroughMLIR][NFC] BinOpKind_Max NYI ThroughMLIR lowering (#1233)
  
  ghehg
  authored and
  lanza
  committed
  129feaa
- [CIR][CIRGen] Introduce cir.delete.array op (#1172)
  
  ChuanqiXu9
  authored and
  lanza
  committed
  95ddbd9
- [CIR][CIRGen] Support Lambda capturing `this` object (#1213)
  
  ghehg
  authored and
  lanza
  committed
  c8ade18
- [CIR][CIRGen] Fixes function calls with return values and cleanup stage (#1214)
  
  gitoleg
  authored and
  lanza
  committed
  40be77f
- [CIR] Put loop body in nested scopes (#1221)
  
  Lancern
  authored and
  lanza
  committed
  031fb9c
- [CIR][Dialect] Add FMaximumOp and FMinimumOp (#1237)
  
  ghehg
  authored and
  lanza
  committed
  9d3c1cc
- [CIR][CIRGen][TBAA] Add support for scalar types (#1220)
  
  PikachuHyA
  authored and
  lanza
  committed
  4a4f647
- [CIR][CodeGen][NFC] centralized split `std::initializer_list` field (#1235)
  
  HerrCai0907
  authored and
  lanza
  committed
  541ea8f
- [CIR][CIRGen][Builtin][Neon] Lower neon_vaddv_f32, neon_vaddvq_f32 and neon_vaddvq_f64 (#1238)
  
  ghehg
  authored and
  lanza
  committed
  2c521be
- [CIR][CIRGen][Builtin][Neon] Lower neon_vmax_v and neon_vmaxq_v (#1239)
  
  ghehg
  authored and
  lanza
  committed
  a6a15c3
- [CIR][NFC] Silence warning from recent PR
  
  bcardosolopes
  authored and
  lanza
  committed
  22e4ce8
- [CIR][CIRGen][TBAA] Replace hardcoded TBAA names with getTBAAName (#1242)
  
  PikachuHyA
  authored and
  lanza
  committed
  7ec6c02
- [CIR][CodeGen] fixes access to globals with bitfields (#1244)
  
  gitoleg
  authored and
  lanza
  committed
  de8ca87
- [CIR][CIRGen][Builtin][Neon] Lower neon_vaddvq_s64/s32, neon_vaddv_s32/u32, (#1240)
  
  authored and
  lanza
  committed
  abb0ad7
- [CIR] Introduce a new dir in tests for known crashes to fix
  lanza
  committed
  5f8989c
- [CIR][Lowering] fixes return value for = operator for bitfields (#1247)
  
  gitoleg
  authored and
  lanza
  committed
  de6469f
- Revert "[CIR][CIRGen][TBAA] Replace hardcoded TBAA names with getTBAAName (#1242)"
  
  bcardosolopes
  authored and
  lanza
  committed
  a37479d
- Revert "[CIR][CIRGen][TBAA] Add support for scalar types (#1220)"
  
  bcardosolopes
  authored and
  lanza
  committed
  fc5ef40
- [CIR][Types] Mimic OG codegen on isFuncParamTypeConvertible
  
  bcardosolopes
  authored and
  lanza
  committed
  1e31146
- [CIR] Lower `cir.bool` to i1 (#1158)
  
  orbiri
  authored and
  lanza
  committed
  2666203
- [CIR][CIRGen] Improve emission for array of unions (#1236)
  
  ChuanqiXu9
  authored and
  lanza
  committed
  3864a88
- [CIR][CIRGen][Builtin][Neon] Lower neon_vsetq_lane_f64 (#1251)
  
  AmrDeveloper
  authored and
  lanza
  committed
  5dd38b2
- [CIR][CIRGen][Builtin][Neon] Lower `neon_vaddd_s64` and `neon_vaddd_u64` (#1255)
  
  AmrDeveloper
  authored and
  lanza
  committed
  947433b
- [CIR][CIRGen][Builtin][Neon] Lower `neon_vsubd_s64` and `neon_vsubd_u64` (#1256)
  
  AmrDeveloper
  authored and
  lanza
  committed
  9735539
- [CIR][CIRGen][Builtin][Neon] Lower `vaddh_f16`, `vsubh_f16`, `vmulh_f16` and `vdivh_f16` (#1258)
  
  AmrDeveloper
  authored and
  lanza
  committed
  4d7d214
- [CIR][CIRGen][Builtin][Neon] Lower vshld_n_s64 and vshld_n_u64 (#1259)
  
  AmrDeveloper
  authored and
  lanza
  committed
  2a9daa9
- [CIR][CIRGen][Builtin][Neon] Lower vshrd_n_s64 (#1260)
  
  AmrDeveloper
  authored and
  lanza
  committed
  df1b606
- [CIR][CIRGen][Builtin][Neon] Lower neon_vset_lane_f64 (#1253)
  
  AmrDeveloper
  authored and
  lanza
  committed
  ba8ff4c
- [CIR] Add MLIR lowering for f16, bf16, and f128 (#1264)
  
  Lancern
  authored and
  lanza
  committed
  f233f1a
- Lower neon_vmaxvq_u8,neon_vmaxvq_s8, neon_vmaxv_u8 and neon_vmaxvq_s8 (#1265)
  
  ghehg
  authored and
  lanza
  committed
  b0a4d33
- [CIR][CodeGen] handle zero init padding case (#1257)
  
  gitoleg
  authored and
  lanza
  committed
  981f07a
- [CIR] Cleanup: convert from Clang type to CIR type (#1271)
  
  dkolsen-pgi
  authored and
  lanza
  committed
  b8c5a34
- [CIR][CIRGen][Builtin][Neon] Lower vabsh_f16 (#1269)
  
  AmrDeveloper
  authored and
  lanza
  committed
  55181f0
- [CIR][CIRGen][NFCI] Get more scope information to match OG
  
  bcardosolopes
  authored and
  lanza
  committed
  2195035
- [CIR] Add support for GCC function attribute "const" and "pure" (#1262)
  
  Lancern
  authored and
  lanza
  committed
  11a0c26
- Revert "[CIR] Remove the !cir.void return type for functions returning void (#1203)"
  lanza
  committed
  4e37eb7
- [CIR] Remove return !cir.void from IR and textual representation (#1249)
  
  keryell
  authored and
  lanza
  committed
  489de07
- [CIR][CodeGen][NFC] Add documentation regarding memory emission deferral (#1279)
  
  orbiri
  authored and
  lanza
  committed
  d2e8197
- [CIR][Doc][NFC] Add a description for all the passes (#1282)
  
  keryell
  authored and
  lanza
  committed
  3cf0d5f
- [CIR][CIRGen] Fix CXX codegen for default args (#1278)
  
  gitoleg
  authored and
  lanza
  committed
  4212838
- [CIR][CIRGen] virtual table pointer initialization without ctor (#1283)
  
  ghehg
  authored and
  lanza
  committed
  d70f1f1
- [CIR] Data member pointer comparison and casts (#1268)
  
  Lancern
  authored and
  lanza
  committed
  0dd0622
- [CIR] Add integer result type for cir.global_view (#1248)
  
  Lancern
  authored and
  lanza
  committed
  200dbd8
- [CIR][CIRGen] Simplify LLVM IR array initialization for clang CIR (#1280)
  
  Rajveer100
  authored and
  lanza
  committed
  596c50f
- [CIR][NFC] Add cleanup region to ScopeOp
  
  bcardosolopes
  authored and
  lanza
  committed
  442bff7
- [CIR] Add limited support for array new (#1286)
  
  andykaylor
  authored and
  lanza
  committed
  a2527c7
- [CIR] Fix build due to deprecated interfaces (#1299)
  
  darkbuck
  authored and
  lanza
  committed
  45c9231
- [CIR] Cleanup cir.scopes with a single cir.yield operation (#1291)
  
  AmrDeveloper
  authored and
  lanza
  committed
  bbe1e81
- [CIR] Add initial support for array cookies (#1297)
  
  andykaylor
  authored and
  lanza
  committed
  0108e09
- [CIR][NFC] Teach op parsers to use enum keyword parsing helpers (#1298)
  
  AmrDeveloper
  authored and
  lanza
  committed
  6fce557
- [CIR] Fix vector issues from latest rebase
  
  bcardosolopes
  authored and
  lanza
  committed
  473ff1b
- [CIR][CIRGen] Add padding to unions (#1289)
  
  gitoleg
  authored and
  lanza
  committed
  f9293c4
- [CIR][CIRGen][Builtin][Clang] Lowering clang::AArch64::BI__builtin_arm_ldaex (#1293)
  
  AmrDeveloper
  authored and
  lanza
  committed
  453892a
- [CIR] Fix Lowering/ptrstride.cir xfailed after rebasing (#1302)
  
  AmrDeveloper
  authored and
  lanza
  committed
  ef22e0f
- [CIR] Implement support for zero-initialized builtin type allocation (#1304)
  
  andykaylor
  authored and
  lanza
  committed
  8606fed
- [CIR][CIRGen] Implement array cookie ABI for AppleARM64 targets (#1301)
  
  andykaylor
  authored and
  lanza
  committed
  765d92c
- [CIR] Implement partial initialization for array new (#1307)
  
  andykaylor
  authored and
  lanza
  committed
  242b48b
- [CIR][Codegen] Fixes global variables that point to another globals (#1277)
  
  gitoleg
  authored and
  lanza
  committed
  ef6d075
- [CIR][ABI][Lowering] Fixes calling convention (#1308)
  
  gitoleg
  authored and
  lanza
  committed
  d9e602a
- [CIR][CUDA] Initial support for host compilation (#1309)
  
  AdUhTkJm
  authored and
  lanza
  committed
  02cbd3c
- [CIR][CUDA] Initial support for device compilation (#1311)
  
  AdUhTkJm
  authored and
  lanza
  committed
  6042fe9
- [CIR] Enable cir.bool binops (#1312)
  
  andykaylor
  authored and
  lanza
  committed
  d84e99d
Commits on Mar 18, 2025
- [CIR] Silence warnings introduced in the past few weeks
  
  bcardosolopes
  authored and
  lanza
  committed
  99a9c8c
- [CIR] Implement array new handling for variable array size (#1313)
  
  andykaylor
  authored and
  lanza
  committed
  6bacbcd
- [CIR] Add attribute visitor for lowering globals (#1318)
  
  andykaylor
  authored and
  lanza
  committed
  82950ca
- [CIR][HIP] Compile host code (#1319)
  
  koparasy
  authored and
  lanza
  committed
  5d2007b
- [CIR][CIRGen][Builtin][Neon] Lower neon_vuzp_v and neon_vuzpq_v (#1314)
  
  AmrDeveloper
  authored and
  lanza
  committed
  d38092f
- [CIR][CUDA] Generate attribute for kernel name of device stubs (#1317)
  
  AdUhTkJm
  authored and
  lanza
  committed
  6b167f8
- [CIR][HIP] Compile HIP device code (#1322)
  
  koparasy
  authored and
  lanza
  committed
  2535bf5
- [CIR][CIRGen] Handle __sync_{and,or,xor}_and_fetch (#1328)
  
  authored and
  lanza
  committed
  292a561
- [CIR][CIRGen] Support __builtin_isinf_sign (#1142)
  
  PikachuHyA
  authored and
  lanza
  committed
  1444fc1
- [CIR][CIRGen][Builtin][Neon] Lower neon_vzip_v and neon_vzipq_v (#1320)
  
  AmrDeveloper
  authored and
  lanza
  committed
  efb6c85
- [CIR][NFC] Replace CIR attr visitor base class with a type switch (#1330)
  
  andykaylor
  authored and
  lanza
  committed
  46fa370
- [CIR][CIRGen][Builtin][Neon] Lower neon_vsra_n_v and neon_vsraq_n_v (#1326)
  
  FantasqueX
  authored and
  lanza
  committed
  5095142
- [CIR][CIRGen] Add alignment attribute to AtomicCmpXchg (#1327)
  
  FantasqueX
  authored and
  lanza
  committed
  ce6e888
- [CIR][CIRGen][TBAA] Add support for scalar types (#1329)
  
  PikachuHyA
  authored and
  lanza
  committed
  e1a212c
- [CIR][CodeGen] Add initial support for __cxa_rethrow (#1290)
  
  bruteforceboy
  authored and
  lanza
  committed
  f4d2b56
- [CIR] Correct initialization of VoidPtrPtrTy (#1336)
  
  AdUhTkJm
  authored and
  lanza
  committed
  7a15736
- [CIR][NFC] Refactor GlobalOpLowering to align with upstream (#1337)
  
  andykaylor
  authored and
  lanza
  committed
  626a007
- [CIR][CUDA] Generate device stubs (#1332)
  
  AdUhTkJm
  authored and
  lanza
  committed
  ceb01db
- [CIR][CIRGen] Support for builtin `__atomic_thread_fence` (#1287)
  
  Rajveer100
  authored and
  lanza
  committed
  245e140
- [CIR][ABI][AArch64][Lowering] Fix calls for struct types > 128 bits (#1335)
  
  bruteforceboy
  authored and
  lanza
  committed
  9949de9
- [CIR] Fix error messages when the conversion to MLIR standard dialects fails. (#1310)
  
  Jezurko
  authored and
  lanza
  committed
  bd8ea20
- [CIR][HIP] Use CUDA attributes for HIP global functions (#1333)
  
  koparasy
  authored and
  lanza
  committed
  3567f09
- Revert "[CIR][HIP] Use CUDA attributes for HIP global functions (#1333)"
  
  bcardosolopes
  authored and
  lanza
  committed
  a9bcb4d
- [CIR][CUDA][NFC] Skeleton of `setCUDAKernelCallingConvention` (#1344)
  
  AdUhTkJm
  authored and
  lanza
  committed
  54b36a7
- [CIR][CIRGen][Builtin][Neon] Lower neon_vstl1_lane_s64 and vstl1q_lane_s64 (#1340)
  
  AmrDeveloper
  authored and
  lanza
  committed
  4b27ff8
- [CIR] Add support for array new with constructors (#1347)
  
  andykaylor
  authored and
  lanza
  committed
  7d8ec63
- [CIR][CUDA] Generate kernel calls (#1348)
  
  AdUhTkJm
  authored and
  lanza
  committed
  e8e434a
- [CIR] Add missing Language::CIR cases (#1349)
  
  xlauko
  authored and
  lanza
  committed
  b9f0fb5
- [CIR] Lower nested local constant alloca (#1261)
  
  Lancern
  authored and
  lanza
  committed
  59e7eb9
- [CIR][NFC] Fix typo (#1366)
  
  FantasqueX
  authored and
  lanza
  committed
  3a02101
- [CIR][CIRGen][Builtin][Neon] Lower neon_vldap1_lane_s64 and vldap1q_lane_s64 (#1346)
  
  AmrDeveloper
  authored and
  lanza
  committed
  49f42c7
- [CIR][CIRGen][Builtin][Neon] Lower neon_vaddlv s16 and u16 (#1352)
  
  AmrDeveloper
  authored and
  lanza
  committed
  8d77ae1
- [CIR][CIRGen][Builtin][Neon] Lower neon_vsrad_n_s64 (#1355)
  
  AmrDeveloper
  authored and
  lanza
  committed
  6c8cc7e
- [CIR][CIRGen] Atomics: handle atomic_compare_exchange_weak (#1359)
  
  FantasqueX
  authored and
  lanza
  committed
  11b3488
- [CIR][CIRGen][Builtin][Neon] Lower vget_lane_bf16, vduph_lane f16 and bf16 (#1360)
  
  AmrDeveloper
  authored and
  lanza
  committed
  7cd4023
- [CIR][CIRGen] handle `__builtin_elementwise_acos` (#1362)
  
  FantasqueX
  authored and
  lanza
  committed
  f7e5e94
- [CIR][CIRGen] handle vectors of size 3 like size 4 for better performance (#1363)
  
  FantasqueX
  authored and
  lanza
  committed
  5df8c01
- [CIR][CUDA] Handle shared and local variables (#1368)
  
  AdUhTkJm
  authored and
  lanza
  committed
  fbf1581
- [CIR] Add handling for initializing multi-dimension arrays (#1369)
  
  andykaylor
  authored and
  lanza
  committed
  9fa9d18
- [CIR][HIP|CUDA] Generate global storing CUDA|HIP stub function (#1341)
  
  koparasy
  authored and
  lanza
  committed
  58c03ea
- [CIR][CIRGen][Builtin][Neon] Lower neon_vshrd_n_u64 (#1353)
  
  AmrDeveloper
  authored and
  lanza
  committed
  0943911
- [CIR][CIRGen][Builtin][Neon] Lower neon_vsrad_n_u64 (#1356)
  
  AmrDeveloper
  authored and
  lanza
  committed
  59493c0
- [CIR][Bugfix] fixes global array of pointers (#1350)
  
  gitoleg
  authored and
  lanza
  committed
  4d47993
- [CIR][CIRGen] Handle __sync_nand_and_fetch (#1351)
  
  moar55
  authored and
  lanza
  committed
  93765ff
- [CIR][CIRGen][Builtin][Neon] Lower vgetq_lane_bf16, vduph f16 and fb16 (#1372)
  
  AmrDeveloper
  authored and
  lanza
  committed
  4ff53b6
- [CIR][CIRGen] Add more support for __cxa_rethrow (#1343)
  
  bruteforceboy
  authored and
  lanza
  committed
  e2b4540
- [CIR][CIRGen][TBAA] Add CIR_TBAAStructAttr (#1365)
  
  PikachuHyA
  authored and
  lanza
  committed
  a6fd39f
- [CIR][CodeGen] Fix extra Yieldop case during try-catch generation (#1370)
  
  bruteforceboy
  authored and
  lanza
  committed
  334c30e
- [CIR][CIRGen] handle `__builtin_elementwise_exp` (#1376)
  
  FantasqueX
  authored and
  lanza
  committed
  5f1f57c
- [CIR][CIRGen][Builtin][Neon] Lower vrsrad_n u64 and s64 (#1379)
  
  AmrDeveloper
  authored and
  lanza
  committed
  eca2e55
- [CIR] Fix Address element type problems (#1373)
  
  andykaylor
  authored and
  lanza
  committed
  a19d530
- [CIR][CUDA] Skeleton of NVPTX target lowering info (#1358)
  
  AdUhTkJm
  authored and
  lanza
  committed
  e1e08cf
- [CIR][CUDA] Add attribute for CUDA fat binary name (#1377)
  
  AdUhTkJm
  authored and
  lanza
  committed
  e55ad76
- [CIR][CIRGen][Builtin][Neon] Lower neon_vrshrd_n for s64 and u64 (#1383)
  
  AmrDeveloper
  authored and
  lanza
  committed
  a2d7768
- [CIR][CIRGen][Builtin][Neon] Lower builtin_neon_vqshld_n s64 and u64 (#1385)
  
  AmrDeveloper
  authored and
  lanza
  committed
  6890355
- [CIR] LLVM lowering support for pointers to member functions (#1292)
  
  Lancern
  authored and
  lanza
  committed
  f35546e
- [CIR][CIRGen][Builtin][Neon] Lower builtin_neon_vqshlud_n_s64 (#1384)
  
  AmrDeveloper
  authored and
  lanza
  committed
  4669855
- [CIR] Add support for __builtin_bitreverse (#1386)
  
  Lancern
  authored and
  lanza
  committed
  7a4763b
- [CIR][CIRGen][Builtin][Neon] Lower neon_vrnd32x (#1388)
  
  AmrDeveloper
  authored and
  lanza
  committed
  265c075
- [CIR] CallConvLowering for X86 aggregate (#1387)
  
  AdUhTkJm
  authored and
  lanza
  committed
  8d170c0
- [CIR][NFC] Un XFAIL global-bar-simple test (#1395)
  
  FantasqueX
  authored and
  lanza
  committed
  f9d4c4c
- [CIR][CIRGen][builtin] handle `_mm_clflush` (#1397)
  
  FantasqueX
  authored and
  lanza
  committed
  65b46b5
- [CIR][CIRGen][Builtin][Neon] Lower vrnd32z and vrnd32zq (#1399)
  
  AmrDeveloper
  authored and
  lanza
  committed
  49ba380
- [CIR][CodeGen] Support return in TryOp (#1398)
  
  bruteforceboy
  authored and
  lanza
  committed
  e0244f3
- [CIR][Lowering][TBAA] Lower CIR_TBAAStructAttr (#1381)
  
  PikachuHyA
  authored and
  lanza
  committed
  10059b9
- [CIR] New assembly format for function type return (#1391)
  
  dkolsen-pgi
  authored and
  lanza
  committed
  d169505
- [CIR][CUDA] Fix CUDA CIR mangling bug (#1396)
  
  advay168
  authored and
  lanza
  committed
  0a0500c
- [CIR] ClangIR specific .clang-tidy files (#1402)
  
  dkolsen-pgi
  authored and
  lanza
  committed
  8a068e9
- [CIR] Add support for comparisons between pointers to member functions (#1390)
  
  Lancern
  authored and
  lanza
  committed
  f0a74e0
- [CIR][CUDA] support for device variables (#1394)
  
  JamesL425
  authored and
  lanza
  committed
  809c370
- [CIR] clang-tidy CIRGenFunction.cpp (#1410)
  
  dkolsen-pgi
  authored and
  lanza
  committed
  2f10c09
- [CIR] Remove redundant BoolType customAssemblyFormat (NFC) (#1407)
  
  xlauko
  authored and
  lanza
  committed
  0ed3ce0
- [CIR][CIRGen][Builtin][Neon] Lower vrnd64x and vrnd64xq (#1400)
  
  AmrDeveloper
  authored and
  lanza
  committed
  24e1d77
- [CIR] Track size_t and int size with module attributes (#1389)
  
  AdUhTkJm
  authored and
  lanza
  committed
  41efb52
- [CIR][CIRGen] Simplify __builtin_elementwise_abs (#1393)
  
  FantasqueX
  authored and
  lanza
  committed
  a735c0c
- [CIR] Simple casts on pointers to member functions (#1409)
  
  Lancern
  authored and
  lanza
  committed
  d33063b
- [CIR] Simplify FuncType printer/parser (#1413)
  
  xlauko
  authored and
  lanza
  committed
  a47d48e
- [CIR][CIRGen][Builtin][Neon] Lower vrnd64z and vrnd64zq (#1401)
  
  AmrDeveloper
  authored and
  lanza
  committed
  700bafc
- [CIR][ThroughMLIR] remove nested memref wrapper for array types (#1412)
  
  PikachuHyA
  authored and
  lanza
  committed
  4a6c446
- [CIR] Delete `FuncOp::verifyType` (#1421)
  
  dkolsen-pgi
  authored and
  lanza
  committed
  1108d7e
- [CIR][Github][CI] Add clangir upstream rebase workflow (#1345)
  
  xlauko
  authored and
  lanza
  committed
  a844b1b
- [CIR][CodeGen] Emit cir.resume for synthetic TryOp's in place (#1418)
  
  bruteforceboy
  authored and
  lanza
  committed
  c245e6f
- [CIR] clang-tidy CIRGenModule.cpp (#1428)
  
  dkolsen-pgi
  authored and
  lanza
  committed
  e9808c1
- [CIR] Add syncscope to AtomicCmpXchgOp (#1419)
  
  FantasqueX
  authored and
  lanza
  committed
  eb25ff3
- [CIR] Clean up and complete CIRGlobalValueInterface methods (#1423)
  
  xlauko
  authored and
  lanza
  committed
  703c45e
- [CIR] Base-to-derived and derived-to-base casts on pointers to member functions (#1424)
  
  Lancern
  authored and
  lanza
  committed
  b2212ac
- [CIR][CUDA] Fix destructor behaviour (#1422)
  
  AdUhTkJm
  authored and
  lanza
  committed
  77885cd
- [CIR][CIRGen] Move CIRGenModule::getTargetCIRGenInfo() to CIRGenModule.cpp (#1426)
  
  advay168
  authored and
  lanza
  committed
  d4cd88e
- [CIR] Change AtomicFenceOp's syncscope to OptionalAttr (#1429)
  
  FantasqueX
  authored and
  lanza
  committed
  0f231b1
- [CIR][CIRGen][Builtin][Neon] Lower vcaged_f64 (#1432)
  
  AmrDeveloper
  authored and
  lanza
  committed
  80bbe6d
- [CIR][Lowering][TBAA] distinct C and C++ (#1406)
  
  PikachuHyA
  authored and
  lanza
  committed
  7f44386
- [CIR][CUDA] Treat nvptx triple as alias for nvptx64 (#1420)
  
  advay168
  authored and
  lanza
  committed
  d076f0a
- [CIR][CodeGen] Fix std::ofstream fail during CodeGen (#1437)
  
  bruteforceboy
  authored and
  lanza
  committed
  36fb12d
- [CIR][CUDA] Lowering device and shared variables (#1438)
  
  AdUhTkJm
  authored and
  lanza
  committed
  747d112
- [CIR][CUDA] Generate registration function (Part 1) (#1415)
  
  AdUhTkJm
  authored and
  lanza
  committed
  ba7332d
- [CIR][CIRGen][TBAA] Add support for enum (#1435)
  
  PikachuHyA
  authored and
  lanza
  committed
  b0aafb2
- [CIR] Add option to emit MLIR in LLVM dialect. (#1316)
  
  Jezurko
  authored and
  lanza
  committed
  1318975
- [CIR] Disable -Woverloaded-virtual when compiling with gcc (#1440)
  
  andykaylor
  authored and
  lanza
  committed
  27b3efb
- [CIR] Fix test to use -emit-mlir=core
  
  bcardosolopes
  authored and
  lanza
  committed
  b35509b
- [CIR] Fix multiple warnings across CIR codebase
  
  bcardosolopes
  authored and
  lanza
  committed
  4e2c357
- [CIR] Remove -clangir-disable-passes from test
  
  bcardosolopes
  authored and
  lanza
  committed
  b748136
- [CIR][CIRGen][Neon] Make vrndns emit RoundEvenOp directly (#1434)
  
  FantasqueX
  authored and
  lanza
  committed
  cb6ce95
- [CIR][CIRGen][TBAA] Add support for BitInt (#1443)
  
  PikachuHyA
  authored and
  lanza
  committed
  ca07d1b
- [CIR] Fix attributes lowering for GlobalOp (#1447)
  
  AdUhTkJm
  authored and
  lanza
  committed
  11a2777
- [CIR][CIRGen][Builtin][Neon] Lower vcagtd_f64 (#1448)
  
  AmrDeveloper
  authored and
  lanza
  committed
  9116979
- [CIR][CIRGen][Builtin][Neon] Lower neon vaddlvq_s32 (#1450)
  
  AmrDeveloper
  authored and
  lanza
  committed
  2dcbe23
- [CIR][CIRGen][Builtin][Neon] Lower neon vaddlv_u32 (#1451)
  
  AmrDeveloper
  authored and
  lanza
  committed
  35cd6ec
- [CIR][CIRGen][TBAA] Add support for pointer tbaa (#1452)
  
  PikachuHyA
  authored and
  lanza
  committed
  2cd4fbf
- [CIR][CIRGen][Neon] Make vrnda emit RoundOp directly (#1453)
  
  FantasqueX
  authored and
  lanza
  committed
  f0111ff
- [CIR][CUDA] Support for built-in CUDA surface type (#1455)
  
  JamesL425
  authored and
  lanza
  committed
  4d861f6
- [CIR][CUDA] Fix address space values for NVPTX (#1445)
  
  anominos
  authored and
  lanza
  committed
  5e50b7e
- [CIR][CIRGen][Builtin][Neon] Lower neon vcages_f32 (#1449)
  
  AmrDeveloper
  authored and
  lanza
  committed
  9aba928
- [CIR][CUDA] Add target-specific attributes (#1457)
  
  AdUhTkJm
  authored and
  lanza
  committed
  5591ae8
- [CIR][CIRGen][Builtin][Neon] Lower neon vmaxv_f32 (#1460)
  
  AmrDeveloper
  authored and
  lanza
  committed
  624b139
- [CIR][CUDA] implement cuda constant variables (#1444)
  
  anominos
  authored and
  lanza
  committed
  3b62a12
- [CIR][CUDA] Register __global__ functions (#1441)
  
  AdUhTkJm
  authored and
  lanza
  committed
  9320a84
- [CIR][CUDA] Miscellanous bugfixes (#1462)
  
  AdUhTkJm
  authored and
  lanza
  committed
  26d342e
- [CIR][CIRGen][Builtin][Neon] Lower neon vaddlv_s32 (#1464)
  
  AmrDeveloper
  authored and
  lanza
  committed
  5371e59
- [CIR][CUDA] Generate CUDA destructor (#1470)
  
  AdUhTkJm
  authored and
  lanza
  committed
  a120c21
- [CIR][CIRGen][builtin] handle `__lzcnt` (#1382)
  
  FantasqueX
  authored and
  lanza
  committed
  444da4f
- [CIR][CUDA] Support builtin CUDA variables (#1458)
  
  authored and
  lanza
  committed
  be7bab5
- [CIR][CUDA] Support for inbuilt texture types (#1469)
  
  JamesL425
  authored and
  lanza
  committed
  0dc6ca6
- [CIR] Lower `signext` and `zeroext` attributes (#1473)
  
  AdUhTkJm
  authored and
  lanza
  committed
  b233fd1
- [CIR][CIRGen][TBAA] Add support for vtable pointer (#1463)
  
  PikachuHyA
  authored and
  lanza
  committed
  af77107
- [CIR][CIRGen][builtin][X86] handle _mm_lfence (#1474)
  
  FantasqueX
  authored and
  lanza
  committed
  28f9896
- [CIR][CUDA] Support device-side printf (#1475)
  
  AdUhTkJm
  authored and
  lanza
  committed
  07e9d6e
- [CIR][CIRGen][builtin] handle `__popcnt` (#1479)
  
  FantasqueX
  authored and
  lanza
  committed
  6d6b23a
- [CIR][CUDA] CallConvLowering for basic types in NVPTX (#1468)
  
  AdUhTkJm
  authored and
  lanza
  committed
  5781e00
- [CIR][NFC] Fix test failures caused by double spaces in check line (#1486)
  
  seven-mile
  authored and
  lanza
  committed
  c6fca3d
- [CIR] Fix assertion in CIRGenTypes::isFuncParamTypeConvertible (#1487)
  
  Lancern
  authored and
  lanza
  committed
  ba0c9fd
- [CIR][CIRGen][Builtin][Neon] Lower neon vabsd_s64 (#1489)
  
  AmrDeveloper
  authored and
  lanza
  committed
  f2eb0f7
- [CIR] Implement ::verify for cir.atomic.xchg and cir.atomic.cmp_xchg (#1431)
  
  Icaro-Nunes
  authored and
  lanza
  committed
  1b1a832
- [CIR][CIRGen][Builtin][Neon] Lower neon vcaled_f64 (#1495)
  
  AmrDeveloper
  authored and
  lanza
  committed
  4cf5576
- [CIR][CIRGen][builtin] handle _mm_pause (#1493)
  
  shrikardongre
  authored and
  lanza
  committed
  7679ba9
- [CIR] Add support for nontemporal loads and stores (#1494)
  
  Lancern
  authored and
  lanza
  committed
  79d0d74
Commits on Mar 19, 2025
Commits on Mar 20, 2025
Commits on Mar 21, 2025
Commits on Mar 24, 2025
Commits on Mar 25, 2025
Commits on Mar 26, 2025
Commits on Mar 28, 2025
- [CIR][ThroughMLIR] Add ACosOp Lowering (#1529)
  ayokunle321
  authored
  62520a4
- [CIR][CIRGen][Builtin][Neon] Lower vmaxv_s32 (#1533)
  AmrDeveloper
  authored
  05b785a
Commits on Mar 31, 2025
Commits on Apr 1, 2025

Commits

Commits on Mar 17, 2025

Commits on Mar 18, 2025