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Jul 22, 2025
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[GlobalISel] Allow Legalizer to lower volatile memcpy family. #145997

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936aa77
[GlobalISel] Allow Legalizer to lower volatile memcpy family.
petechou Jun 26, 2025
13f1a7b
address review comment
petechou Jul 15, 2025
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6 changes: 1 addition & 5 deletions llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -10098,14 +10098,10 @@ LegalizerHelper::lowerMemCpyFamily(MachineInstr &MI, unsigned MaxLen) {
return Legalized;
}

bool IsVolatile = MemOp->isVolatile();
// Don't try to optimize volatile.
if (IsVolatile)
return UnableToLegalize;

if (MaxLen && KnownLen > MaxLen)
return UnableToLegalize;

bool IsVolatile = MemOp->isVolatile();
if (Opc == TargetOpcode::G_MEMCPY) {
auto &MF = *MI.getParent()->getParent();
const auto &TLI = *MF.getSubtarget().getTargetLowering();
Expand Down
188 changes: 67 additions & 121 deletions llvm/test/CodeGen/AArch64/aarch64-mops.ll
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Expand Up @@ -87,46 +87,17 @@ entry:
}

define void @memset_10_zeroval_volatile(ptr %dst) {
; GISel-WITHOUT-MOPS-O0-LABEL: memset_10_zeroval_volatile:
; GISel-WITHOUT-MOPS-O0: // %bb.0: // %entry
; GISel-WITHOUT-MOPS-O0-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; GISel-WITHOUT-MOPS-O0-NEXT: .cfi_def_cfa_offset 16
; GISel-WITHOUT-MOPS-O0-NEXT: .cfi_offset w30, -16
; GISel-WITHOUT-MOPS-O0-NEXT: mov w8, #10 // =0xa
; GISel-WITHOUT-MOPS-O0-NEXT: mov w2, w8
; GISel-WITHOUT-MOPS-O0-NEXT: mov w1, wzr
; GISel-WITHOUT-MOPS-O0-NEXT: bl memset
; GISel-WITHOUT-MOPS-O0-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; GISel-WITHOUT-MOPS-O0-NEXT: ret
;
; GISel-WITHOUT-MOPS-O3-LABEL: memset_10_zeroval_volatile:
; GISel-WITHOUT-MOPS-O3: // %bb.0: // %entry
; GISel-WITHOUT-MOPS-O3-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; GISel-WITHOUT-MOPS-O3-NEXT: .cfi_def_cfa_offset 16
; GISel-WITHOUT-MOPS-O3-NEXT: .cfi_offset w30, -16
; GISel-WITHOUT-MOPS-O3-NEXT: mov w1, wzr
; GISel-WITHOUT-MOPS-O3-NEXT: mov w2, #10 // =0xa
; GISel-WITHOUT-MOPS-O3-NEXT: bl memset
; GISel-WITHOUT-MOPS-O3-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; GISel-WITHOUT-MOPS-O3-NEXT: ret
;
; GISel-MOPS-O0-LABEL: memset_10_zeroval_volatile:
; GISel-MOPS-O0: // %bb.0: // %entry
; GISel-MOPS-O0-NEXT: mov w8, #10 // =0xa
; GISel-MOPS-O0-NEXT: // kill: def $x8 killed $w8
; GISel-MOPS-O0-NEXT: mov x9, xzr
; GISel-MOPS-O0-NEXT: setp [x0]!, x8!, x9
; GISel-MOPS-O0-NEXT: setm [x0]!, x8!, x9
; GISel-MOPS-O0-NEXT: sete [x0]!, x8!, x9
; GISel-MOPS-O0-NEXT: ret
; GISel-WITHOUT-MOPS-LABEL: memset_10_zeroval_volatile:
; GISel-WITHOUT-MOPS: // %bb.0: // %entry
; GISel-WITHOUT-MOPS-NEXT: str xzr, [x0]
; GISel-WITHOUT-MOPS-NEXT: strh wzr, [x0, #8]
; GISel-WITHOUT-MOPS-NEXT: ret
;
; GISel-MOPS-O3-LABEL: memset_10_zeroval_volatile:
; GISel-MOPS-O3: // %bb.0: // %entry
; GISel-MOPS-O3-NEXT: mov w8, #10 // =0xa
; GISel-MOPS-O3-NEXT: setp [x0]!, x8!, xzr
; GISel-MOPS-O3-NEXT: setm [x0]!, x8!, xzr
; GISel-MOPS-O3-NEXT: sete [x0]!, x8!, xzr
; GISel-MOPS-O3-NEXT: ret
; GISel-MOPS-LABEL: memset_10_zeroval_volatile:
; GISel-MOPS: // %bb.0: // %entry
; GISel-MOPS-NEXT: str xzr, [x0]
; GISel-MOPS-NEXT: strh wzr, [x0, #8]
; GISel-MOPS-NEXT: ret
;
; SDAG-WITHOUT-MOPS-O2-LABEL: memset_10_zeroval_volatile:
; SDAG-WITHOUT-MOPS-O2: // %bb.0: // %entry
Expand Down Expand Up @@ -490,43 +461,46 @@ entry:
define void @memset_10_volatile(ptr %dst, i32 %value) {
; GISel-WITHOUT-MOPS-O0-LABEL: memset_10_volatile:
; GISel-WITHOUT-MOPS-O0: // %bb.0: // %entry
; GISel-WITHOUT-MOPS-O0-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; GISel-WITHOUT-MOPS-O0-NEXT: .cfi_def_cfa_offset 16
; GISel-WITHOUT-MOPS-O0-NEXT: .cfi_offset w30, -16
; GISel-WITHOUT-MOPS-O0-NEXT: mov w8, #10 // =0xa
; GISel-WITHOUT-MOPS-O0-NEXT: mov w2, w8
; GISel-WITHOUT-MOPS-O0-NEXT: bl memset
; GISel-WITHOUT-MOPS-O0-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; GISel-WITHOUT-MOPS-O0-NEXT: // implicit-def: $x8
; GISel-WITHOUT-MOPS-O0-NEXT: mov w8, w1
; GISel-WITHOUT-MOPS-O0-NEXT: and x8, x8, #0xff
; GISel-WITHOUT-MOPS-O0-NEXT: mov x9, #72340172838076673 // =0x101010101010101
; GISel-WITHOUT-MOPS-O0-NEXT: mul x8, x8, x9
; GISel-WITHOUT-MOPS-O0-NEXT: str x8, [x0]
; GISel-WITHOUT-MOPS-O0-NEXT: // kill: def $w8 killed $w8 killed $x8
; GISel-WITHOUT-MOPS-O0-NEXT: strh w8, [x0, #8]
; GISel-WITHOUT-MOPS-O0-NEXT: ret
;
; GISel-WITHOUT-MOPS-O3-LABEL: memset_10_volatile:
; GISel-WITHOUT-MOPS-O3: // %bb.0: // %entry
; GISel-WITHOUT-MOPS-O3-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; GISel-WITHOUT-MOPS-O3-NEXT: .cfi_def_cfa_offset 16
; GISel-WITHOUT-MOPS-O3-NEXT: .cfi_offset w30, -16
; GISel-WITHOUT-MOPS-O3-NEXT: mov w2, #10 // =0xa
; GISel-WITHOUT-MOPS-O3-NEXT: bl memset
; GISel-WITHOUT-MOPS-O3-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; GISel-WITHOUT-MOPS-O3-NEXT: // kill: def $w1 killed $w1 def $x1
; GISel-WITHOUT-MOPS-O3-NEXT: mov x8, #72340172838076673 // =0x101010101010101
; GISel-WITHOUT-MOPS-O3-NEXT: and x9, x1, #0xff
; GISel-WITHOUT-MOPS-O3-NEXT: mul x8, x9, x8
; GISel-WITHOUT-MOPS-O3-NEXT: str x8, [x0]
; GISel-WITHOUT-MOPS-O3-NEXT: strh w8, [x0, #8]
; GISel-WITHOUT-MOPS-O3-NEXT: ret
;
; GISel-MOPS-O0-LABEL: memset_10_volatile:
; GISel-MOPS-O0: // %bb.0: // %entry
; GISel-MOPS-O0-NEXT: mov w8, #10 // =0xa
; GISel-MOPS-O0-NEXT: // kill: def $x8 killed $w8
; GISel-MOPS-O0-NEXT: // implicit-def: $x9
; GISel-MOPS-O0-NEXT: mov w9, w1
; GISel-MOPS-O0-NEXT: setp [x0]!, x8!, x9
; GISel-MOPS-O0-NEXT: setm [x0]!, x8!, x9
; GISel-MOPS-O0-NEXT: sete [x0]!, x8!, x9
; GISel-MOPS-O0-NEXT: // implicit-def: $x8
; GISel-MOPS-O0-NEXT: mov w8, w1
; GISel-MOPS-O0-NEXT: and x8, x8, #0xff
; GISel-MOPS-O0-NEXT: mov x9, #72340172838076673 // =0x101010101010101
; GISel-MOPS-O0-NEXT: mul x8, x8, x9
; GISel-MOPS-O0-NEXT: str x8, [x0]
; GISel-MOPS-O0-NEXT: // kill: def $w8 killed $w8 killed $x8
; GISel-MOPS-O0-NEXT: strh w8, [x0, #8]
; GISel-MOPS-O0-NEXT: ret
;
; GISel-MOPS-O3-LABEL: memset_10_volatile:
; GISel-MOPS-O3: // %bb.0: // %entry
; GISel-MOPS-O3-NEXT: mov w8, #10 // =0xa
; GISel-MOPS-O3-NEXT: // kill: def $w1 killed $w1 def $x1
; GISel-MOPS-O3-NEXT: setp [x0]!, x8!, x1
; GISel-MOPS-O3-NEXT: setm [x0]!, x8!, x1
; GISel-MOPS-O3-NEXT: sete [x0]!, x8!, x1
; GISel-MOPS-O3-NEXT: mov x8, #72340172838076673 // =0x101010101010101
; GISel-MOPS-O3-NEXT: and x9, x1, #0xff
; GISel-MOPS-O3-NEXT: mul x8, x9, x8
; GISel-MOPS-O3-NEXT: str x8, [x0]
; GISel-MOPS-O3-NEXT: strh w8, [x0, #8]
; GISel-MOPS-O3-NEXT: ret
;
; SDAG-WITHOUT-MOPS-O2-LABEL: memset_10_volatile:
Expand Down Expand Up @@ -905,43 +879,21 @@ entry:
}

define void @memcpy_10_volatile(ptr %dst, ptr %src, i32 %value) {
; GISel-WITHOUT-MOPS-O0-LABEL: memcpy_10_volatile:
; GISel-WITHOUT-MOPS-O0: // %bb.0: // %entry
; GISel-WITHOUT-MOPS-O0-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; GISel-WITHOUT-MOPS-O0-NEXT: .cfi_def_cfa_offset 16
; GISel-WITHOUT-MOPS-O0-NEXT: .cfi_offset w30, -16
; GISel-WITHOUT-MOPS-O0-NEXT: mov w8, #10 // =0xa
; GISel-WITHOUT-MOPS-O0-NEXT: mov w2, w8
; GISel-WITHOUT-MOPS-O0-NEXT: bl memcpy
; GISel-WITHOUT-MOPS-O0-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; GISel-WITHOUT-MOPS-O0-NEXT: ret
;
; GISel-WITHOUT-MOPS-O3-LABEL: memcpy_10_volatile:
; GISel-WITHOUT-MOPS-O3: // %bb.0: // %entry
; GISel-WITHOUT-MOPS-O3-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; GISel-WITHOUT-MOPS-O3-NEXT: .cfi_def_cfa_offset 16
; GISel-WITHOUT-MOPS-O3-NEXT: .cfi_offset w30, -16
; GISel-WITHOUT-MOPS-O3-NEXT: mov w2, #10 // =0xa
; GISel-WITHOUT-MOPS-O3-NEXT: bl memcpy
; GISel-WITHOUT-MOPS-O3-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; GISel-WITHOUT-MOPS-O3-NEXT: ret
;
; GISel-MOPS-O0-LABEL: memcpy_10_volatile:
; GISel-MOPS-O0: // %bb.0: // %entry
; GISel-MOPS-O0-NEXT: mov w8, #10 // =0xa
; GISel-MOPS-O0-NEXT: // kill: def $x8 killed $w8
; GISel-MOPS-O0-NEXT: cpyfp [x0]!, [x1]!, x8!
; GISel-MOPS-O0-NEXT: cpyfm [x0]!, [x1]!, x8!
; GISel-MOPS-O0-NEXT: cpyfe [x0]!, [x1]!, x8!
; GISel-MOPS-O0-NEXT: ret
; GISel-WITHOUT-MOPS-LABEL: memcpy_10_volatile:
; GISel-WITHOUT-MOPS: // %bb.0: // %entry
; GISel-WITHOUT-MOPS-NEXT: ldr x8, [x1]
; GISel-WITHOUT-MOPS-NEXT: str x8, [x0]
; GISel-WITHOUT-MOPS-NEXT: ldrh w8, [x1, #8]
; GISel-WITHOUT-MOPS-NEXT: strh w8, [x0, #8]
; GISel-WITHOUT-MOPS-NEXT: ret
;
; GISel-MOPS-O3-LABEL: memcpy_10_volatile:
; GISel-MOPS-O3: // %bb.0: // %entry
; GISel-MOPS-O3-NEXT: mov w8, #10 // =0xa
; GISel-MOPS-O3-NEXT: cpyfp [x0]!, [x1]!, x8!
; GISel-MOPS-O3-NEXT: cpyfm [x0]!, [x1]!, x8!
; GISel-MOPS-O3-NEXT: cpyfe [x0]!, [x1]!, x8!
; GISel-MOPS-O3-NEXT: ret
; GISel-MOPS-LABEL: memcpy_10_volatile:
; GISel-MOPS: // %bb.0: // %entry
; GISel-MOPS-NEXT: ldr x8, [x1]
; GISel-MOPS-NEXT: str x8, [x0]
; GISel-MOPS-NEXT: ldrh w8, [x1, #8]
; GISel-MOPS-NEXT: strh w8, [x0, #8]
; GISel-MOPS-NEXT: ret
;
; SDAG-WITHOUT-MOPS-O2-LABEL: memcpy_10_volatile:
; SDAG-WITHOUT-MOPS-O2: // %bb.0: // %entry
Expand Down Expand Up @@ -1736,40 +1688,34 @@ entry:
define void @memmove_10_volatile(ptr %dst, ptr %src, i32 %value) {
; GISel-WITHOUT-MOPS-O0-LABEL: memmove_10_volatile:
; GISel-WITHOUT-MOPS-O0: // %bb.0: // %entry
; GISel-WITHOUT-MOPS-O0-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; GISel-WITHOUT-MOPS-O0-NEXT: .cfi_def_cfa_offset 16
; GISel-WITHOUT-MOPS-O0-NEXT: .cfi_offset w30, -16
; GISel-WITHOUT-MOPS-O0-NEXT: mov w8, #10 // =0xa
; GISel-WITHOUT-MOPS-O0-NEXT: mov w2, w8
; GISel-WITHOUT-MOPS-O0-NEXT: bl memmove
; GISel-WITHOUT-MOPS-O0-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; GISel-WITHOUT-MOPS-O0-NEXT: ldr x9, [x1]
; GISel-WITHOUT-MOPS-O0-NEXT: ldrh w8, [x1, #8]
; GISel-WITHOUT-MOPS-O0-NEXT: str x9, [x0]
; GISel-WITHOUT-MOPS-O0-NEXT: strh w8, [x0, #8]
; GISel-WITHOUT-MOPS-O0-NEXT: ret
;
; GISel-WITHOUT-MOPS-O3-LABEL: memmove_10_volatile:
; GISel-WITHOUT-MOPS-O3: // %bb.0: // %entry
; GISel-WITHOUT-MOPS-O3-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; GISel-WITHOUT-MOPS-O3-NEXT: .cfi_def_cfa_offset 16
; GISel-WITHOUT-MOPS-O3-NEXT: .cfi_offset w30, -16
; GISel-WITHOUT-MOPS-O3-NEXT: mov w2, #10 // =0xa
; GISel-WITHOUT-MOPS-O3-NEXT: bl memmove
; GISel-WITHOUT-MOPS-O3-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; GISel-WITHOUT-MOPS-O3-NEXT: ldr x8, [x1]
; GISel-WITHOUT-MOPS-O3-NEXT: ldrh w9, [x1, #8]
; GISel-WITHOUT-MOPS-O3-NEXT: str x8, [x0]
; GISel-WITHOUT-MOPS-O3-NEXT: strh w9, [x0, #8]
; GISel-WITHOUT-MOPS-O3-NEXT: ret
;
; GISel-MOPS-O0-LABEL: memmove_10_volatile:
; GISel-MOPS-O0: // %bb.0: // %entry
; GISel-MOPS-O0-NEXT: mov w8, #10 // =0xa
; GISel-MOPS-O0-NEXT: // kill: def $x8 killed $w8
; GISel-MOPS-O0-NEXT: cpyp [x0]!, [x1]!, x8!
; GISel-MOPS-O0-NEXT: cpym [x0]!, [x1]!, x8!
; GISel-MOPS-O0-NEXT: cpye [x0]!, [x1]!, x8!
; GISel-MOPS-O0-NEXT: ldr x9, [x1]
; GISel-MOPS-O0-NEXT: ldrh w8, [x1, #8]
; GISel-MOPS-O0-NEXT: str x9, [x0]
; GISel-MOPS-O0-NEXT: strh w8, [x0, #8]
; GISel-MOPS-O0-NEXT: ret
;
; GISel-MOPS-O3-LABEL: memmove_10_volatile:
; GISel-MOPS-O3: // %bb.0: // %entry
; GISel-MOPS-O3-NEXT: mov w8, #10 // =0xa
; GISel-MOPS-O3-NEXT: cpyp [x0]!, [x1]!, x8!
; GISel-MOPS-O3-NEXT: cpym [x0]!, [x1]!, x8!
; GISel-MOPS-O3-NEXT: cpye [x0]!, [x1]!, x8!
; GISel-MOPS-O3-NEXT: ldr x8, [x1]
; GISel-MOPS-O3-NEXT: ldrh w9, [x1, #8]
; GISel-MOPS-O3-NEXT: str x8, [x0]
; GISel-MOPS-O3-NEXT: strh w9, [x0, #8]
; GISel-MOPS-O3-NEXT: ret
;
; SDAG-WITHOUT-MOPS-O2-LABEL: memmove_10_volatile:
Expand Down
30 changes: 30 additions & 0 deletions llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memcpy.mir
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Expand Up @@ -31,3 +31,33 @@ body: |
S_ENDPGM 0

...
---
name: memcpy_test_volatile
body: |
bb.0:
liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3

; CHECK-LABEL: name: memcpy_test_volatile
; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
; CHECK-NEXT: [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
; CHECK-NEXT: [[MV1:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32)
; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[MV1]](p0) :: (volatile load (s8))
; CHECK-NEXT: G_STORE [[LOAD]](s32), [[MV]](p0) :: (volatile store (s8))
; CHECK-NEXT: S_ENDPGM 0
%0:_(s32) = COPY $vgpr0
%1:_(s32) = COPY $vgpr1
%2:_(p0) = G_MERGE_VALUES %0:_(s32), %1:_(s32)
%3:_(s32) = COPY $vgpr2
%4:_(s32) = COPY $vgpr3
%5:_(p0) = G_MERGE_VALUES %3:_(s32), %4:_(s32)
%6:_(s32) = G_CONSTANT i32 1
%7:_(s64) = G_ZEXT %6:_(s32)
G_MEMCPY %2:_(p0), %5:_(p0), %7:_(s64), 0 :: (volatile store (s8)), (volatile load (s8))
S_ENDPGM 0

...
30 changes: 30 additions & 0 deletions llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memcpyinline.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -31,3 +31,33 @@ body: |
S_ENDPGM 0

...
---
name: memcpyinline_test_volatile
body: |
bb.0:
liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3

; CHECK-LABEL: name: memcpyinline_test_volatile
; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
; CHECK-NEXT: [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
; CHECK-NEXT: [[MV1:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32)
; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[MV1]](p0) :: (volatile load (s8))
; CHECK-NEXT: G_STORE [[LOAD]](s32), [[MV]](p0) :: (volatile store (s8))
; CHECK-NEXT: S_ENDPGM 0
%0:_(s32) = COPY $vgpr0
%1:_(s32) = COPY $vgpr1
%2:_(p0) = G_MERGE_VALUES %0:_(s32), %1:_(s32)
%3:_(s32) = COPY $vgpr2
%4:_(s32) = COPY $vgpr3
%5:_(p0) = G_MERGE_VALUES %3:_(s32), %4:_(s32)
%6:_(s32) = G_CONSTANT i32 1
%7:_(s64) = G_ZEXT %6:_(s32)
G_MEMCPY_INLINE %2:_(p0), %5:_(p0), %7:_(s64) :: (volatile store (s8)), (volatile load (s8))
S_ENDPGM 0

...
30 changes: 30 additions & 0 deletions llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memmove.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -31,3 +31,33 @@ body: |
S_ENDPGM 0

...
---
name: memmove_test_volatile
body: |
bb.0:
liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3

; CHECK-LABEL: name: memmove_test_volatile
; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
; CHECK-NEXT: [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
; CHECK-NEXT: [[MV1:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32)
; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[MV1]](p0) :: (volatile load (s8))
; CHECK-NEXT: G_STORE [[LOAD]](s32), [[MV]](p0) :: (volatile store (s8))
; CHECK-NEXT: S_ENDPGM 0
%0:_(s32) = COPY $vgpr0
%1:_(s32) = COPY $vgpr1
%2:_(p0) = G_MERGE_VALUES %0:_(s32), %1:_(s32)
%3:_(s32) = COPY $vgpr2
%4:_(s32) = COPY $vgpr3
%5:_(p0) = G_MERGE_VALUES %3:_(s32), %4:_(s32)
%6:_(s32) = G_CONSTANT i32 1
%7:_(s64) = G_ZEXT %6:_(s32)
G_MEMMOVE %2:_(p0), %5:_(p0), %7:_(s64), 0 :: (volatile store (s8)), (volatile load (s8))
S_ENDPGM 0

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29 changes: 29 additions & 0 deletions llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memset.mir
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Expand Up @@ -30,3 +30,32 @@ body: |
S_ENDPGM 0

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---
name: memset_test_volatile
body: |
bb.0:
liveins: $vgpr0, $vgpr1, $vgpr2

; CHECK-LABEL: name: memset_test_volatile
; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
; CHECK-NEXT: [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY2]](s32)
; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s8) = COPY [[TRUNC]](s8)
; CHECK-NEXT: G_STORE [[COPY2]](s32), [[MV]](p0) :: (volatile store (s8))
; CHECK-NEXT: S_ENDPGM 0
%0:_(s32) = COPY $vgpr0
%1:_(s32) = COPY $vgpr1
%2:_(p0) = G_MERGE_VALUES %0:_(s32), %1:_(s32)
%3:_(s32) = COPY $vgpr2
%4:_(s16) = G_TRUNC %3:_(s32)
%5:_(s8) = G_TRUNC %4:_(s16)
%6:_(s32) = G_CONSTANT i32 1
%7:_(s64) = G_ZEXT %6:_(s32)
G_MEMSET %2:_(p0), %5:_(s8), %7:_(s64), 0 :: (volatile store (s8))
S_ENDPGM 0

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