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[NVPTX] Don't propagate ninf and nnan in lowerFREM #147125

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[NVPTX] Don't propagate ninf and nnan in lowerFREM #147125

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[NVPTX] Don't propagate `ninf` and `nnan` in `lowerFREM`
paperchalice Jul 5, 2025
9b0fec2
address comments
paperchalice Jul 7, 2025
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14 changes: 9 additions & 5 deletions llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -2793,14 +2793,18 @@ static SDValue lowerFREM(SDValue Op, SelectionDAG &DAG,
EVT Ty = Op.getValueType();
SDNodeFlags Flags = Op->getFlags();

SDValue Div = DAG.getNode(ISD::FDIV, DL, Ty, X, Y, Flags);
SDValue Trunc = DAG.getNode(ISD::FTRUNC, DL, Ty, Div, Flags);
// fdiv can still generate inf and nan when nnan and ninf are set.
SDNodeFlags NewFlags = Flags;
NewFlags.setNoNaNs(false);
NewFlags.setNoInfs(false);
SDValue Div = DAG.getNode(ISD::FDIV, DL, Ty, X, Y, NewFlags);
SDValue Trunc = DAG.getNode(ISD::FTRUNC, DL, Ty, Div, NewFlags);
SDValue Mul = DAG.getNode(ISD::FMUL, DL, Ty, Trunc, Y,
Flags | SDNodeFlags::AllowContract);
NewFlags | SDNodeFlags::AllowContract);
SDValue Sub = DAG.getNode(ISD::FSUB, DL, Ty, X, Mul,
Flags | SDNodeFlags::AllowContract);
NewFlags | SDNodeFlags::AllowContract);

if (AllowUnsafeFPMath || Flags.hasNoInfs())
if (AllowUnsafeFPMath || (Flags.hasNoInfs() && Flags.hasApproximateFuncs()))
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@arsenm arsenm Jul 7, 2025

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You shouldn't touch the afn thing here. I also did not mean this tail section of the function is wrong, I meant the entire implementation of this function is wrong

return Sub;

// If Y is infinite, return X
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11 changes: 11 additions & 0 deletions llvm/test/CodeGen/NVPTX/frem-ninf-nnan.ll
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@@ -0,0 +1,11 @@
; RUN: llc %s --stop-after=finalize-isel -mcpu=sm_60 -o - | FileCheck %s

target triple = "nvptx64-unknown-cuda"

define float @frem_ninf_nnan(float %a, float %b) {
; CHECK: nnan ninf FDIV32rr_prec
; CHECK-NOT: nnan ninf contract FNEGf32
; CHECK: contract FNEGf32
%r = frem ninf nnan float %a, %b
ret float %r
}
10 changes: 5 additions & 5 deletions llvm/test/CodeGen/NVPTX/frem.ll
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Expand Up @@ -147,14 +147,14 @@ define half @frem_f16_ninf(half %a, half %b) {
; NORMAL-NEXT: ld.param.b16 %rs2, [frem_f16_ninf_param_1];
; NORMAL-NEXT: cvt.f32.f16 %r1, %rs2;
; NORMAL-NEXT: cvt.f32.f16 %r2, %rs1;
; NORMAL-NEXT: div.rn.f32 %r3, %r2, %r1;
; NORMAL-NEXT: div.approx.f32 %r3, %r2, %r1;
; NORMAL-NEXT: cvt.rzi.f32.f32 %r4, %r3;
; NORMAL-NEXT: neg.f32 %r5, %r4;
; NORMAL-NEXT: fma.rn.f32 %r6, %r5, %r1, %r2;
; NORMAL-NEXT: cvt.rn.f16.f32 %rs3, %r6;
; NORMAL-NEXT: st.param.b16 [func_retval0], %rs3;
; NORMAL-NEXT: ret;
%r = frem ninf half %a, %b
%r = frem ninf afn half %a, %b
ret half %r
}

Expand All @@ -180,13 +180,13 @@ define float @frem_f32_ninf(float %a, float %b) {
; NORMAL-NEXT: // %bb.0:
; NORMAL-NEXT: ld.param.b32 %r1, [frem_f32_ninf_param_0];
; NORMAL-NEXT: ld.param.b32 %r2, [frem_f32_ninf_param_1];
; NORMAL-NEXT: div.rn.f32 %r3, %r1, %r2;
; NORMAL-NEXT: div.approx.f32 %r3, %r1, %r2;
; NORMAL-NEXT: cvt.rzi.f32.f32 %r4, %r3;
; NORMAL-NEXT: neg.f32 %r5, %r4;
; NORMAL-NEXT: fma.rn.f32 %r6, %r5, %r2, %r1;
; NORMAL-NEXT: st.param.b32 [func_retval0], %r6;
; NORMAL-NEXT: ret;
%r = frem ninf float %a, %b
%r = frem ninf afn float %a, %b
ret float %r
}

Expand Down Expand Up @@ -218,7 +218,7 @@ define double @frem_f64_ninf(double %a, double %b) {
; NORMAL-NEXT: fma.rn.f64 %rd6, %rd5, %rd2, %rd1;
; NORMAL-NEXT: st.param.b64 [func_retval0], %rd6;
; NORMAL-NEXT: ret;
%r = frem ninf double %a, %b
%r = frem ninf afn double %a, %b
ret double %r
}

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