MC,AMDGPU: Don't pad .text with s_code_end if it would otherwise be empty

llvm/lib/MC/MCAsmStreamer.cpp

@@ -2427,6 +2427,8 @@ void MCAsmStreamer::AddEncodingComment(const MCInst &Inst,
 
 void MCAsmStreamer::emitInstruction(const MCInst &Inst,
                                     const MCSubtargetInfo &STI) {
+  MCStreamer::emitInstruction(Inst, STI);
+
   if (MAI->isAIX() && CurFrag)
     // Now that a machine instruction has been assembled into this section, make
     // a line entry for any .loc directive that has been seen.

llvm/lib/MC/MCObjectStreamer.cpp

@@ -342,12 +342,10 @@ void MCObjectStreamer::emitInstructionImpl(const MCInst &Inst,
                                            const MCSubtargetInfo &STI) {
   MCStreamer::emitInstruction(Inst, STI);
 
-  MCSection *Sec = getCurrentSectionOnly();
-  Sec->setHasInstructions(true);
-
   // Now that a machine instruction has been assembled into this section, make
   // a line entry for any .loc directive that has been seen.
-  MCDwarfLineEntry::make(this, getCurrentSectionOnly());
+  MCSection *Sec = getCurrentSectionOnly();
+  MCDwarfLineEntry::make(this, Sec);
 
   // If this instruction doesn't need relaxation, just emit it as data.
   MCAssembler &Assembler = getAssembler();

llvm/lib/MC/MCStreamer.cpp

@@ -1194,6 +1194,9 @@ void MCStreamer::visitUsedExpr(const MCExpr &Expr) {
 }
 
 void MCStreamer::emitInstruction(const MCInst &Inst, const MCSubtargetInfo &) {
+  if (MCSection *Sec = getCurrentSection().first)
+    Sec->setHasInstructions(true);
+
   // Scan for values.
   for (unsigned i = Inst.getNumOperands(); i--;)
     if (Inst.getOperand(i).isExpr())

llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp

@@ -486,12 +486,16 @@ bool AMDGPUAsmPrinter::doFinalization(Module &M) {
   // Pad with s_code_end to help tools and guard against instruction prefetch
   // causing stale data in caches. Arguably this should be done by the linker,
   // which is why this isn't done for Mesa.
+  // Don't do it if there is no code.
   const MCSubtargetInfo &STI = *getGlobalSTI();
   if ((AMDGPU::isGFX10Plus(STI) || AMDGPU::isGFX90A(STI)) &&
       (STI.getTargetTriple().getOS() == Triple::AMDHSA ||
        STI.getTargetTriple().getOS() == Triple::AMDPAL)) {
-    OutStreamer->switchSection(getObjFileLowering().getTextSection());
-    getTargetStreamer()->EmitCodeEnd(STI);
+    MCSection *TextSect = getObjFileLowering().getTextSection();
+    if (TextSect->hasInstructions()) {
+      OutStreamer->switchSection(TextSect);
+      getTargetStreamer()->EmitCodeEnd(STI);
+    }
   }
 
   // Assign expressions which can only be resolved when all other functions are

llvm/test/CodeGen/AMDGPU/empty-text.ll

@@ -0,0 +1,9 @@
+; Test that there is no s_code_end padding if .text is othertwise empty.
+
+; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1200 < %s | FileCheck %s --check-prefixes=GCN
+
+@globalVar = global i32 37
+
+declare amdgpu_ps void @funcDecl()
+
+; GCN-NOT: .fill