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AMDGPU: Allow readonly features to be written to IR when there is no target #148141

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Merged
merged 9 commits into from
Jul 29, 2025
Merged

AMDGPU: Allow readonly features to be written to IR when there is no target #148141

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c9cf987
AMDGPU: Remove "gws" from the “read-only” target feature list
changpeng Jul 11, 2025
5beb2e8
AMDGPU: Remove "gws" from the “read-only” target feature list
changpeng Jul 11, 2025
d78dfd9
AMDGPU: Remove "gws" from the “read-only” target feature list
changpeng Jul 11, 2025
de11611
Merge branch 'llvm:main' into readonly
changpeng Jul 15, 2025
afeec4b
Merge branch 'llvm:main' into readonly
changpeng Jul 16, 2025
532226f
Merge branch 'llvm:main' into readonly
changpeng Jul 18, 2025
57ea48f
Merge branch 'llvm:main' into readonly
changpeng Jul 21, 2025
56aa23d
AMDGPU: Mark features as read-only only when target supports them
changpeng Jul 21, 2025
870f9a9
AMDGPU: Allow readonly features to be written to IR when there is no …
changpeng Jul 22, 2025
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2 changes: 1 addition & 1 deletion clang/lib/Basic/Targets/AMDGPU.cpp
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Expand Up @@ -266,7 +266,7 @@ AMDGPUTargetInfo::AMDGPUTargetInfo(const llvm::Triple &Triple,

MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
CUMode = !(GPUFeatures & llvm::AMDGPU::FEATURE_WGP);
for (auto F : {"image-insts", "gws", "vmem-to-lds-load-insts"})
for (auto F : {"image-insts", "vmem-to-lds-load-insts"})
ReadOnlyFeatures.insert(F);
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@shiltian shiltian Jul 11, 2025

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What does this ReadOnlyFeatures do?

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@changpeng changpeng Jul 11, 2025

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What does this ReadOnlyFeatures do?

Prevent clang from writing a feature to the IR. But I can not see much benefit in doing that.

HalfArgsAndReturns = true;
}
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8 changes: 4 additions & 4 deletions clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
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Expand Up @@ -816,12 +816,12 @@ kernel void test_target_features_kernel(global int *i) {
// NOCPU: attributes #[[ATTR10]] = { convergent nounwind }
//.
// GFX900: attributes #[[ATTR0:[0-9]+]] = { "objc_arc_inert" }
// GFX900: attributes #[[ATTR1]] = { convergent norecurse nounwind "denormal-fp-math-f32"="preserve-sign,preserve-sign" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="gfx900" "target-features"="+16-bit-insts,+ci-insts,+dpp,+gfx8-insts,+gfx9-insts,+s-memrealtime,+s-memtime-inst,+wavefrontsize64,-sram-ecc" }
// GFX900: attributes #[[ATTR2]] = { convergent norecurse nounwind "amdgpu-flat-work-group-size"="1,256" "denormal-fp-math-f32"="preserve-sign,preserve-sign" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="gfx900" "target-features"="+16-bit-insts,+ci-insts,+dpp,+gfx8-insts,+gfx9-insts,+s-memrealtime,+s-memtime-inst,+wavefrontsize64,-sram-ecc" "uniform-work-group-size"="false" }
// GFX900: attributes #[[ATTR3]] = { alwaysinline convergent norecurse nounwind "amdgpu-flat-work-group-size"="1,256" "denormal-fp-math-f32"="preserve-sign,preserve-sign" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="gfx900" "target-features"="+16-bit-insts,+ci-insts,+dpp,+gfx8-insts,+gfx9-insts,+s-memrealtime,+s-memtime-inst,+wavefrontsize64,-sram-ecc" }
// GFX900: attributes #[[ATTR1]] = { convergent norecurse nounwind "denormal-fp-math-f32"="preserve-sign,preserve-sign" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="gfx900" "target-features"="+16-bit-insts,+ci-insts,+dpp,+gfx8-insts,+gfx9-insts,+gws,+s-memrealtime,+s-memtime-inst,+wavefrontsize64,-sram-ecc" }
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@arsenm arsenm Jul 11, 2025

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Emitting this into the IR is still wrong, it should only appear if and only if the feature isn't already implied by the target cpu. Treating this as "readonly" is the wrong modeling

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@changpeng changpeng Jul 11, 2025

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Right. We need to write a feature to the IR unless it is implied by the target. The readonly mechanism is not appropriate here for this purpose.

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@yxsamliu yxsamliu Jul 14, 2025

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is it possible we only let the target feature show up in IR when the processor does not support it or when the processor is not specified?

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@changpeng changpeng Jul 14, 2025

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What about if we compile with different target for a given IR?
In addition, I think a new mechanism maybe needed, but is beyond this work because "gws" is no difference from other features in the list. Thanks

// GFX900: attributes #[[ATTR2]] = { convergent norecurse nounwind "amdgpu-flat-work-group-size"="1,256" "denormal-fp-math-f32"="preserve-sign,preserve-sign" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="gfx900" "target-features"="+16-bit-insts,+ci-insts,+dpp,+gfx8-insts,+gfx9-insts,+gws,+s-memrealtime,+s-memtime-inst,+wavefrontsize64,-sram-ecc" "uniform-work-group-size"="false" }
// GFX900: attributes #[[ATTR3]] = { alwaysinline convergent norecurse nounwind "amdgpu-flat-work-group-size"="1,256" "denormal-fp-math-f32"="preserve-sign,preserve-sign" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="gfx900" "target-features"="+16-bit-insts,+ci-insts,+dpp,+gfx8-insts,+gfx9-insts,+gws,+s-memrealtime,+s-memtime-inst,+wavefrontsize64,-sram-ecc" }
// GFX900: attributes #[[ATTR4:[0-9]+]] = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
// GFX900: attributes #[[ATTR5:[0-9]+]] = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
// GFX900: attributes #[[ATTR6]] = { convergent nounwind "denormal-fp-math-f32"="preserve-sign,preserve-sign" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="gfx900" "target-features"="+16-bit-insts,+ci-insts,+dpp,+gfx8-insts,+gfx9-insts,+s-memrealtime,+s-memtime-inst,+wavefrontsize64,-sram-ecc" }
// GFX900: attributes #[[ATTR6]] = { convergent nounwind "denormal-fp-math-f32"="preserve-sign,preserve-sign" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="gfx900" "target-features"="+16-bit-insts,+ci-insts,+dpp,+gfx8-insts,+gfx9-insts,+gws,+s-memrealtime,+s-memtime-inst,+wavefrontsize64,-sram-ecc" }
// GFX900: attributes #[[ATTR7:[0-9]+]] = { nocallback nofree nosync nounwind willreturn }
// GFX900: attributes #[[ATTR8]] = { convergent nounwind }
// GFX900: attributes #[[ATTR9]] = { nounwind }
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6 changes: 0 additions & 6 deletions clang/test/CodeGenOpenCL/amdgpu-features-readonly.cl
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