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[AMDGPU][UnifyDivergentExitNodes][StructurizeCFG] Add support for callbr instruction with inline-asm #152161
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[AMDGPU][UnifyDivergentExitNodes][StructurizeCFG] Add support for callbr instruction with inline-asm #152161
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,54 @@ | ||
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 | ||
; RUN: llc -mtriple=amdgcn -mcpu=gfx90a < %s | FileCheck %s | ||
|
||
define void @callbr_inline_asm(ptr %src, ptr %dst1, ptr %dst2, i32 %c) { | ||
; CHECK-LABEL: callbr_inline_asm: | ||
; CHECK: ; %bb.0: | ||
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) | ||
; CHECK-NEXT: flat_load_dword v0, v[0:1] | ||
; CHECK-NEXT: ;;#ASMSTART | ||
; CHECK-NEXT: v_cmp_gt_i32 vcc v6, 42; s_cbranch_vccnz .LBB0_2 | ||
; CHECK-NEXT: ;;#ASMEND | ||
; CHECK-NEXT: ; %bb.1: ; %fallthrough | ||
; CHECK-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) | ||
; CHECK-NEXT: flat_store_dword v[2:3], v0 | ||
; CHECK-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) | ||
; CHECK-NEXT: s_setpc_b64 s[30:31] | ||
; CHECK-NEXT: .LBB0_2: ; Inline asm indirect target | ||
; CHECK-NEXT: ; %indirect | ||
; CHECK-NEXT: ; Label of block must be emitted | ||
; CHECK-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) | ||
; CHECK-NEXT: flat_store_dword v[4:5], v0 | ||
; CHECK-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) | ||
; CHECK-NEXT: s_setpc_b64 s[30:31] | ||
%a = load i32, ptr %src, align 4 | ||
callbr void asm "v_cmp_gt_i32 vcc $0, 42; s_cbranch_vccnz ${1:l}", "r,!i"(i32 %c) to label %fallthrough [label %indirect] | ||
fallthrough: | ||
store i32 %a, ptr %dst1, align 4 | ||
br label %ret | ||
indirect: | ||
store i32 %a, ptr %dst2, align 4 | ||
br label %ret | ||
ret: | ||
ret void | ||
} | ||
|
||
define void @callbr_self_loop(i1 %c) { | ||
; CHECK-LABEL: callbr_self_loop: | ||
; CHECK: ; %bb.0: | ||
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) | ||
; CHECK-NEXT: .LBB1_1: ; %callbr | ||
; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1 | ||
; CHECK-NEXT: ;;#ASMSTART | ||
; CHECK-NEXT: ;;#ASMEND | ||
; CHECK-NEXT: s_branch .LBB1_1 | ||
; CHECK-NEXT: .LBB1_2: ; Inline asm indirect target | ||
; CHECK-NEXT: ; %callbr.target.ret | ||
; CHECK-NEXT: ; Label of block must be emitted | ||
; CHECK-NEXT: s_setpc_b64 s[30:31] | ||
br label %callbr | ||
callbr: | ||
callbr void asm "", "!i"() to label %callbr [label %ret] | ||
ret: | ||
ret void | ||
} |
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