Skip to content

[TableGen] Fix computeRegUnitLaneMasks for ad hoc aliasing #79462

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Closed
wants to merge 1 commit into from
Closed

[TableGen] Fix computeRegUnitLaneMasks for ad hoc aliasing #79462

Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
8 changes: 6 additions & 2 deletions llvm/utils/TableGen/CodeGenRegisters.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -2144,7 +2144,7 @@ void CodeGenRegBank::computeRegUnitLaneMasks() {
// Create an initial lane mask for all register units.
const auto &RegUnits = Register.getRegUnits();
CodeGenRegister::RegUnitLaneMaskList RegUnitLaneMasks(
RegUnits.count(), LaneBitmask::getAll());
RegUnits.count(), LaneBitmask::getNone());
// Iterate through SubRegisters.
typedef CodeGenRegister::SubRegMap SubRegMap;
const SubRegMap &SubRegs = Register.getSubRegs();
Expand All @@ -2163,7 +2163,7 @@ void CodeGenRegBank::computeRegUnitLaneMasks() {
unsigned u = 0;
for (unsigned RU : RegUnits) {
if (SUI == RU) {
RegUnitLaneMasks[u] &= LaneMask;
RegUnitLaneMasks[u] |= LaneMask;
assert(!Found);
Found = true;
}
Expand All @@ -2173,6 +2173,10 @@ void CodeGenRegBank::computeRegUnitLaneMasks() {
assert(Found);
}
}
for (auto &Mask : RegUnitLaneMasks) {
if (Mask.none())
Mask = LaneBitmask::getAll();
}
Register.setRegUnitLaneMasks(RegUnitLaneMasks);
}
}
Expand Down