Sunxi 3.4.61 r1 rt77 i2s cs4245

[fkwp]

Hi,
for a audio premap project (using the Cubietruck as ac3 and dts multichannel decoder) I got aware of your excelent sunxi i2s code rework/refactoring. Since my hardware setup only consists of 3 DACs connected to the cubietrucks i2s bus I needed some changes in order to operate the cubietruck in i2s MasterClock mode. Therefor I adapted the "dummy" soundcard driver sunxi-sndi2s.c to enable the soc_dai MasterClock mode. In addition I fixed some settings in regarding the MasterClock. Finaly I set the channels_max to 8 which enables multichannel output via i2s.

kind regards

[RafaelGuayer]

Hi fkwp, i will take a look and merge it on monday.

I have lots of changes to push and I am working on this right now.

I dont recommend using sunxi-sndi2s.c as Machine Driver and sndi2s.c as codec driver.

You should do your own machine and codec driver. Check mod-duo.c (machine) and cs4245.c (codec) for that. They are integrated with plataform drivers sunxi-i2s and sunxi-i2sdma.

What DAC are you using? Whats the control interface of the DAC? I2C?

If i recall i had made the modifications to 8ch on sunxi-i2s.c but not on sunxi-i2sdma.c.

Best regards,

Rafael Guayer

[fkwp]

Hi Rafael,

we are using 3x DIY friendly dac-24192 uln units (http://www.ebay.de/itm/DAC-24192-ULN-24Bit-192KHz-DAC-I2S-Input-Ultra-Low-Noise-Regulator-Circuit-/231052067747) which are very simple i2s DACs without any controll interface. Therefor we only need a "dummy" codec driver. But I agree to implement a specific codec driver facing the individual properties of the dac-24192 uln.

The machine driver will use i2c as control interface to control a pre-amplifier (pga2311).

Since I am very new to alsa developing, I am currently trying to understand in which order the codec, machine and platform drivers (callback functions) are called by an alsa playback or capuring event in order to reduce redundancies and cleanup the i2s code (regarding the master clock).

best regards
fkwp

[RafaelGuayer]

fkwp,

AFAIK, after a capture or playback start, the functiona call sequency is:

An userspace call makes the hw_param functions trigger.

The aSoC call starts with static int soc_pcm_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params), in soc-pcm.c

This function get all driver pointers and calls all *_hw_params of the Codec Driver, Plataform Driver and Machine Driver.

*_hw_params -> Machine Driver
*_hw_params -> Codec Driver
*_hw_params-> I2S Plataform Driver
*_hw_params-> I2S MDA Plataform Driver

(call order: - rtd->dai_link = Machine Driver / - codec_dai = Codec Driver / - cpu_dai = I2S / - Plataform Driver / - platform->driver = DMA Plataform Driver)

After _hw_params, it calls some *_ops from the drivers, if they are not null (e.g. *_mute);

After that, the *_trigger functions are called in a sequency determined by

• static int soc_pcm_trigger(struct snd_pcm_substream *substream, int cmd) (soc-pcm.c).

*_trigger function on DMA driver should start DMA then prepare DMA, enqueue DMA.

Then, on sunxi-3.4 for A20, the DMA starts a loop with buffdone (dma callback), enqueue then pointer (here i might be wrong, just uncomment the printks on the sunxi-i2sdma.c that it will show the sequency, but will have a lot of latency).

I would love to use dmaengine here, or a way where dma does not call callback function every transfer end. I think this is causing the underuns. Do you know a way, on A20, to do that inside the aSoC dma driver?

I am still working on the drivers and i will merge some of your work.

By the way, i think you are changing the driver in orde to make sndi2s.c and sunxi-sndi2s.c work. When i did the patch i didn't care about those generic Machine and Codec driver, so they don't work with that patch.

I already done the set_sysclk on sunxi-i2s.c, but it accepted clock real values, not just 0 or 1.

I already done thee set_clckdiv with a function that finds the best divisors for a sample rate, in master mode, of course. In slave mode, all the clock is given by an external master so you don't have to set any clock divisor and even pll_audio.

I think you should implement your own specific machine and codec drivers to work with the patched plataform drivers.

For the PGA, you can find all I2C integration on cs4245.c.

Best regards,

Rafael.

[fkwp]

Hello Rafael,

thank you for your clarification about the function call sequence. With this background I will manage to create our own (preamp specific) machine and codec driver. Nevertheless I suggest to cleanup, purify (pll clock setting issues, etc) and maybe rename sunxi-sndi2s.c and sndi2s.c to provide a stable "dummy" driver for those who only like to attach simple DACs (without master clock) which are common in projects such as Volumio. I can start to work on this issues next monday since I am on holiday until right now. In future it would be nice to provide the i2s work to sunxi upstream...

Unfortunately I am not familiar to the A20 platform regarding DMA specific questions.

kind regards
fkwp