Name		Name	Last commit message	Last commit date
0516225_0516016_REPORT.docx		0516225_0516016_REPORT.docx
ALU.v		ALU.v
ALU_Ctrl.v		ALU_Ctrl.v
Adder.v		Adder.v
Data_Memory.v		Data_Memory.v
Decoder.v		Decoder.v
ICACHE.txt		ICACHE.txt
Instruction_Memory.v		Instruction_Memory.v
MUX_2to1.v		MUX_2to1.v
MUX_3to1.v		MUX_3to1.v
MUX_4to1.v		MUX_4to1.v
ProgramCounter.v		ProgramCounter.v
README.md		README.md
Reg_File.v		Reg_File.v
Shift_Left_Two.v		Shift_Left_Two.v
Shift_Left_Two_Jump.v		Shift_Left_Two_Jump.v
Sign_Extend.v		Sign_Extend.v
Simple_Single_CPU.v		Simple_Single_CPU.v
TestBench.v		TestBench.v
direct_mapped_cache.cpp		direct_mapped_cache.cpp
direct_mapped_cache.exe		direct_mapped_cache.exe
direct_mapped_cache_lru.cpp		direct_mapped_cache_lru.cpp
makefile		makefile

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computer-organization-single-cycle-cpu

add a memory unit to implement a complete single-cycle CPU which can run R-type, I-type and jump instructions.

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add a memory unit to implement a complete single-cycle CPU which can run R-type, I-type and jump instructions.

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