simple-calculator-verilog

An 8-bit calculator that can multiply, add and subtract. Created and simulated in Quartus Prime and physically implemented in DEC-SOC1 FPGA.

Subject: Hardware Description Language Language: Verilog

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Code Previews and Waveforms

Quartus Prime Expected Outputs and Waveform Visual Implementation in Quartus to FPGA

DEC-SoC1 FPGA

Sample Implementation in FPGA