riscv

A cross-platform RISC-V emulator written in Object Pascal.

The project is currently a work in progress, with the codebase organized around a small set of core modules for CPU execution, instruction decoding, memory access, and MMU support.

Overview

This repository contains the emulator implementation, build scripts, and supporting documentation for ongoing RISC-V development.

The current focus is on the core execution pipeline and related infrastructure needed to run and validate RISC-V programs from a bare-metal environment.

Project Structure

• main.pas - Application entry point and runtime harness
• uCPU.pas - CPU state and execution helpers
• uDecoder.pas - Instruction decoding logic
• uExecute.pas - Instruction execution logic
• uBus.pas - Memory and bus access helpers
• uMMU.pas - MMU and address translation support
• SV32Arch.md - Notes and reference material for Sv32 architecture support
• Makefile - Build, run, and clean targets
• .github/workflows - CI workflows for build validation and release checks

Requirements

To build the project locally, install:

• Free Pascal Compiler (fpc)
• make

On macOS or Linux, ensure both tools are available on your PATH.

Build

Build the project with:

make build

To rebuild from a clean state:

make clean
make build

You can also build in debug mode:

make BUILD_MODE=debug build

Run

Run the emulator with:

make run

Continuous Integration

The repository includes GitHub Actions workflows to validate builds automatically:

• Build validation on push and pull request
• Debug build checks
• Smoke-run verification
• Release artifact packaging
• Nightly build verification

Roadmap

The long-term development plan is documented in PLAN.md and is organized into the following phases:

1. RV32I/M interpreter and bare-metal execution
2. Sv32 MMU support, CSRs, and simple OS booting
3. Pascal JIT core with basic block translation and code caching
4. Buildroot Linux boot support

License

No license has been specified yet.