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Nested loop unrolling not supported — breaks common GEMM patterns

architectureStructural/design issuesStructural/design issues

Status: Open.

#40 In Ferryistaken/tg2hdl;

· Ferryistaken opened on Apr 7, 2026

Only one synthesis target (ECP5 45F) — no Xilinx, Intel, or ASIC support

hardwareSynthesis, timing, or physical designSynthesis, timing, or physical design

missing-featureCore capability gapCore capability gap

Status: Open.

#39 In Ferryistaken/tg2hdl;

· Ferryistaken opened on Apr 7, 2026

fp16/bf16 dtypes recognized but completely non-functional

missing-featureCore capability gapCore capability gap

Status: Open.

#38 In Ferryistaken/tg2hdl;

· Ferryistaken opened on Apr 7, 2026

Buffer metadata exists in 3 separate representations

architectureStructural/design issuesStructural/design issues

Status: Open.

#37 In Ferryistaken/tg2hdl;

· Ferryistaken opened on Apr 7, 2026

Simulation timeout heuristic is wrong — max_cycles formula doesn't match comment

bugSomething isn't workingSomething isn't working

Status: Open.

#36 In Ferryistaken/tg2hdl;

· Ferryistaken opened on Apr 7, 2026

No synchronous reset on CompiledKernel FSM

hardwareSynthesis, timing, or physical designSynthesis, timing, or physical design

missing-featureCore capability gapCore capability gap

Status: Open.

#35 In Ferryistaken/tg2hdl;

· Ferryistaken opened on Apr 7, 2026

No convolution, attention, or normalization ops — only dense + elementwise

missing-featureCore capability gapCore capability gap

Status: Open.

#34 In Ferryistaken/tg2hdl;

· Ferryistaken opened on Apr 7, 2026

Simulation logic mixed into compiler modules

architectureStructural/design issuesStructural/design issues

Status: Open.

#33 In Ferryistaken/tg2hdl;

· Ferryistaken opened on Apr 7, 2026

_emit_op() is a 300-line monolith — split arithmetic lowering

architectureStructural/design issuesStructural/design issues

Status: Open.

#32 In Ferryistaken/tg2hdl;

· Ferryistaken opened on Apr 7, 2026

Float handling scattered across 6 files with no unifying abstraction

architectureStructural/design issuesStructural/design issues

Status: Open.

#31 In Ferryistaken/tg2hdl;

· Ferryistaken opened on Apr 7, 2026

No memory hierarchy — single-port on-chip RAM only

hardwareSynthesis, timing, or physical designSynthesis, timing, or physical design

missing-featureCore capability gapCore capability gap

Status: Open.

#30 In Ferryistaken/tg2hdl;

· Ferryistaken opened on Apr 7, 2026

No loop pipelining — 100x performance left on the table

hardwareSynthesis, timing, or physical designSynthesis, timing, or physical design

missing-featureCore capability gapCore capability gap

Status: Open.

#29 In Ferryistaken/tg2hdl;

· Ferryistaken opened on Apr 7, 2026