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Add the V2 generation hi3516cv200/hi3518ev200/hi3518ev201 SoC family (ARM926EJ-S / ARMv5TE) as a third CHIPARCH target alongside the existing hi3516ev200 (V4) and hi3516cv500 (V3.5) families. Key differences from V4/V3.5: MMZ and himedia are standalone kernel modules (not integrated into OSAL), symbol convention is CMPI_* PascalCase, and the chip only supports H.264 + JPEG (no H.265). Kernel modules (28 total, CHIPARCH=hi3516cv200): - Source modules from Hi3518E SDK V1.0.5.0: mmz, himedia, sys_config, mipi_rx, wdt, hiuser, ir, sensor_i2c, sensor_spi, pwm, ISP (full) - Blob modules from OpenIPC pre-built .ko files: base, sys, vi, vpss, venc, h264e, jpege, rc, chnl, rgn, vgs, tde, ive, audio chain - Init wrappers re-export CMPI_*/VB_*/TDE* symbols for inter-module deps Libraries: - 10 sensor drivers (ar0130, ar0230, 9m034, ov2718, ov9712, ov9732, ov9750, ov9752, mn34222, imx222) - ISP algorithm source (20+ algorithms from SDK firmware) Build system: - kernel/hi3516cv200.kbuild: monolithic build config (follows cv500 pattern) - kernel/Kbuild: three-way CHIPARCH branch (cv500 / cv200 / ev200-default) - libraries/Makefile: CV200 sensor directory filtering CI: - Added hi3516cv200 to build matrix (hi3516cv200_lite board) - Added qemu-cv200-boot smoke-test job (boots OpenIPC firmware under qemu-system-arm -M hi3516cv200, verifies login prompt) Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Add modules that were in the Hi3518E SDK but missing from the initial PR: Source modules added: - cipher (drv/cipher/ — 25 source files, disabled in kbuild pending 3.4→4.9 kernel API porting) - rtc (drv/rtc/ — hi_rtc.c, hi_rtc.h, rtc_temp_lut_tbl.h) - piris (already copied, now wired into kbuild) Blob modules added: - vou (hi3518e_vou — video output, 33 VOU_Graphics* exports) - hifb (framebuffer, commented out like CV500) Missing files added: - kernel/wdt/hi3516cv200/watchdog.h - kernel/sensor_spi/hi3516cv200/sensor_spi.h Total: 30 modules now build (was 28). Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
The initial commit's `git add kernel/obj/hi3516cv200/` silently skipped all .o files due to the top-level `*.o` gitignore rule. Force-add them so CI can find the pre-built blobs. Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Sensor Makefiles: fix include path to kernel/include/hi3516cv200/ and kernel/isp/arch/hi3516cv200/include/ (was incorrectly pointing to top-level include/ which doesn't have V2 SDK headers). QEMU CV200 boot test: provide rootfs.squashfs as initrd with root=/dev/ram0 rootfstype=squashfs (matching qemu-hisilicon's run-cv200.sh), and check for "Starting crond: OK" instead of "login:" since OpenIPC goes straight to module loading. Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
- Add firmware/vreg/ and firmware/vreg/arch/hi3518e/ to ISP include paths so isp.c can find hi_drv_vreg.h and isp_metering_mem_config.h - Add #include <linux/ioctl.h> to hi_spi.h so _IOC_SIZEBITS resolves when sensor libraries (imx222) include it in userspace builds ISP now builds without DISABLE_ISP — 31 modules total. Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
The 3a/ directory contained sample_ae, sample_awb reference implementations and duplicate headers. Neither ev200 nor cv500 ship this in openhisilicon — remove for consistency. Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
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Summary
CHIPARCHtargetqemu-system-arm -M hi3516cv200)Key differences from V4/V3.5
CMPI_*PascalCasecmpi_*snake_caseCMPI_*PascalCaseTest plan
CHIPARCH=hi3516cv200against Linux 4.9.37 (0 errors)hi3516cv200_litebuild via OpenIPC firmware🤖 Generated with Claude Code