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feat(difftest): add checkpoint trigger entry#1083

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good-circle merged 1 commit into
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20260614-cpt-pr6
Jul 3, 2026
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feat(difftest): add checkpoint trigger entry#1083
good-circle merged 1 commit into
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20260614-cpt-pr6

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@good-circle good-circle commented Jun 18, 2026 •
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Add difftest_trigger_checkpoint() so REF users can request checkpoint generation from NEMU.

Skip M-mode because the current checkpoint restore path does not reliably support restoring M-mode state. For supported modes, enable the flash checkpoint layout before serializing the checkpoint.

poemonsense
poemonsense reviewed Jun 19, 2026
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Why was there no compilation error before?

@good-circle good-circle changed the title fix(image_loader): match prototypes with implementations feat(difftest): expose checkpoint trigger in SHARE Jun 20, 2026
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good-circle commented Jun 20, 2026 •
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Why was there no compilation error before?

PR8 starts using load_img() from flash.c via memory/image_loader.h. Without this fix, flash.c passes a const char * to the old char * prototype, which fails under -Werror. The implementation already uses const char *; #1085 just syncs the header before PR8 depends on it.

Base automatically changed from 20260614-cpt-pr5 to master July 2, 2026 14:32
@good-circle
feat(difftest): add checkpoint trigger entry
048d10f 
Add difftest_trigger_checkpoint() so REF users can request checkpoint generation from NEMU.

Skip M-mode because the current checkpoint restore path does not reliably support restoring M-mode state. For supported modes, enable the flash checkpoint layout before serializing the checkpoint.
@good-circle good-circle changed the title feat(difftest): expose checkpoint trigger in SHARE feat(difftest): add checkpoint trigger entry Jul 2, 2026
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NEMU Performance Results - XS Interpreter

Test Guest Instructions Host Instructions Estimated Host Throughput (instr/s) Actual NEMU Throughput (instr/s) Baseline Host Instructions Baseline Actual NEMU Throughput (instr/s) Change vs Baseline (Instructions) Change vs Baseline (Throughput)
bitmanip.bin 1.385e+05 5.199e+07 2.664e+07 2.139e+07 5.199e+07 1.691e+07 +0.00% +26.48%
coremark-riscv64-xs-rv64gc-o2.bin 3.354e+06 1.783e+08 1.881e+08 1.674e+08 1.783e+08 1.399e+08 +0.00% +19.64%
coremark-riscv64-xs-rv64gc-o3.bin 3.394e+06 1.777e+08 1.910e+08 1.641e+08 1.777e+08 1.304e+08 +0.00% +25.92%
coremark-riscv64-xs-rv64gcb-o3.bin 3.035e+06 1.749e+08 1.735e+08 1.230e+08 1.749e+08 1.637e+08 -0.00% -24.88%
amtest-riscv64-xs.bin 1.587e+04 8.738e+06 1.816e+07 1.400e+07 8.738e+06 7.462e+06 -0.00% +87.57%
aliastest-riscv64-xs.bin 1.376e+03 7.715e+06 1.784e+06 3.038e+06 7.715e+06 2.714e+06 -0.00% +11.92%
softprefetchtest-riscv64-xs.bin 2.643e+03 7.765e+06 3.404e+06 4.745e+06 7.766e+06 4.814e+06 +0.01% -1.44%
zacas-riscv64-xs.bin 6.470e+04 1.233e+07 5.246e+07 1.277e+07 1.234e+07 1.812e+07 +0.02% -29.51%
linux-hello 6.677e+07 1.682e+10 3.971e+07 4.826e+07 1.682e+10 4.834e+07 +0.00% -0.16%

NEMU Performance Results - XS Ref Shared Object

Test Guest Instructions Host Instructions Estimated Host Throughput (instr/s) Actual NEMU Throughput (instr/s) Baseline Host Instructions Baseline Actual NEMU Throughput (instr/s) Change vs Baseline (Instructions) Change vs Baseline (Throughput)
bitmanip.bin 1.385e+05 1.094e+09 1.266e+06 7.058e+05 1.094e+09 7.151e+05 +0.00% -1.30%
coremark-riscv64-xs-rv64gc-o2.bin 3.354e+06 6.387e+09 5.252e+06 4.565e+06 6.387e+09 4.448e+06 +0.00% +2.63%
coremark-riscv64-xs-rv64gc-o3.bin 3.394e+06 6.415e+09 5.291e+06 3.825e+06 6.415e+09 3.374e+06 +0.00% +13.36%
coremark-riscv64-xs-rv64gcb-o3.bin 3.035e+06 6.036e+09 5.028e+06 3.260e+06 6.036e+09 4.315e+06 +0.00% -24.45%
amtest-riscv64-xs.bin 1.588e+04 3.435e+07 4.621e+06 1.642e+06 3.435e+07 1.531e+06 +0.00% +7.24%
aliastest-riscv64-xs.bin 1.379e+03 4.851e+06 2.843e+06 7.523e+05 4.852e+06 5.848e+05 +0.01% +28.64%
softprefetchtest-riscv64-xs.bin 2.646e+03 6.939e+06 3.813e+06 1.222e+06 6.939e+06 1.117e+06 +0.01% +9.33%
zacas-riscv64-xs.bin 6.471e+04 1.288e+08 5.024e+06 2.198e+06 1.288e+08 2.000e+06 +0.00% +9.90%
linux-hello 7.522e+07 6.673e+11 1.127e+06 1.075e+06 6.673e+11 1.071e+06 +0.00% +0.32%
  • Host Instructions is measured by DynamoRIO's inscount client.
  • Estimated Host Throughput assumes a fixed 4GHz CPU and IPC=2.5.
  • Actual NEMU Throughput is a single native NEMU run and may vary with host CPU performance.
  • Baseline columns are populated on pull_request runs when the PR base contains the same defconfig.
  • Change vs Baseline (Instructions) is computed from host instruction count; positive means fewer host instructions than baseline.
  • Change vs Baseline (Throughput) is computed from native throughput; positive means faster than baseline.

@good-circle good-circle merged commit 42ac288 into master Jul 3, 2026
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@good-circle good-circle deleted the 20260614-cpt-pr6 branch July 3, 2026 10:00
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@poemonsense poemonsense poemonsense approved these changes
@Anzooooo Anzooooo Awaiting requested review from Anzooooo Anzooooo is a code owner

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