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Finished a simple 8-bit register exercise (excluded it from the testi… VHDL practice exercises CI #1: Commit f0ed1e9 pushed by RoiCorporation
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Remove vscode workspace configuration file. VHDL practice exercises CI #21: Commit 60e5bb4 pushed by RoiCorporation
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Removed .DS_Store from .gitignore (it was included in a global gitign… VHDL practice exercises CI #20: Commit 84d1827 pushed by RoiCorporation
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Fix typo in 'wave form' to 'waveform' in README.md file. VHDL practice exercises CI #19: Commit 4751214 pushed by RoiCorporation
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Finished testing the CI script. All tests pass now. VHDL practice exercises CI #18: Commit acf63b0 pushed by RoiCorporation
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Another test. VHDL practice exercises CI #17: Commit 347cac6 pushed by RoiCorporation
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Updated texts.yml VHDL practice exercises CI #16: Commit 277be41 pushed by RoiCorporation
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Testing the CI/CD script. VHDL practice exercises CI #15: Commit 37e2b3b pushed by RoiCorporation
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Remove GPL v3 license badge. VHDL practice exercises CI #14: Commit 38da3bd pushed by RoiCorporation
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Delete LICENSE VHDL practice exercises CI #13: Commit 14dbae8 pushed by RoiCorporation
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Add license badge to README. VHDL practice exercises CI #12: Commit b402ef4 pushed by RoiCorporation
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Created .gitignore and added statement to ignore .DS_Store files VHDL practice exercises CI #11: Commit 251d890 pushed by RoiCorporation
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Fix header formatting in README.md. VHDL practice exercises CI #10: Commit 4c429b1 pushed by RoiCorporation
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Updated link in README.md. VHDL practice exercises CI #9: Commit 517a544 pushed by RoiCorporation
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Corrected and_gate_tb.vhd back to expected value. VHDL practice exercises CI #8: Commit f4c6e60 pushed by RoiCorporation
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Testing updated .yml file. VHDL practice exercises CI #7: Commit 6a92bd9 pushed by RoiCorporation
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Added testing script and updated README.md. VHDL practice exercises CI #6: Commit d8a2187 pushed by RoiCorporation
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Renamed exercise folders VHDL practice exercises CI #5: Commit 702b4c5 pushed by RoiCorporation
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Renamed first_exercise, added or_gate exercise and improved notation … VHDL practice exercises CI #4: Commit 7be38ba pushed by RoiCorporation
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Added worskspace file and improved tests.yml notation. VHDL practice exercises CI #3: Commit a45185c pushed by RoiCorporation
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Fixed left-over testing wrong assertions. VHDL practice exercises CI #2: Commit eb13c7b pushed by RoiCorporation
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First exercise finished, added README.md with all the needed instruct… VHDL practice exercises CI #1: Commit 1c2761a pushed by RoiCorporation
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